Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6091
-gerrit
commit 367a852a37af2901c254dbaaa2d68a79c7517778
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sat Jun 21 21:42:25 2014 +1000
src/console/post.c: Sanitize headers from preprocessor abuse
Some headers could not be taken care of here yet due to deeper issues.
Issues:
1.)
pc80/mc146818rtc.h: In function 'cmos_read':
pc80/mc146818rtc.h:111:2: error: implicit declaration of function 'outb'
pc80/mc146818rtc.h:112:2: error: implicit declaration of function 'inb'
2.)
include/device/device.h is incompatible with ROMCC
Change-Id: I524713b21684f6fa99355614a1ab38aee9975790
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
---
src/console/post.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/console/post.c b/src/console/post.c
index ef1a3a5..dfe2d09 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -20,15 +20,17 @@
*/
#include <arch/io.h>
+#include <elog.h>
#include <console/console.h>
+#include <smp/spinlock.h>
+
+/* FIXME: unwrapping these header guards breaks builds due to deeper issues */
#if CONFIG_CMOS_POST
#include <pc80/mc146818rtc.h>
-#include <smp/spinlock.h>
#endif
-#if CONFIG_CMOS_POST_EXTRA
+#if !defined(__ROMCC__)
#include <device/device.h>
-#endif
-#include <elog.h>
+#endif /* __ROMCC__ */
/* Write POST information */
Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6091
-gerrit
commit 47f2787078c280817d2bb7db8c3b16f35aedb50a
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sat Jun 21 21:42:25 2014 +1000
src/console/post.c: Sanitize headers from preprocessor abuse
Some headers could not be taken care of here yet due to deeper issues.
Change-Id: I524713b21684f6fa99355614a1ab38aee9975790
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
---
src/console/post.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/console/post.c b/src/console/post.c
index ef1a3a5..6b51abc 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -20,15 +20,17 @@
*/
#include <arch/io.h>
+#include <elog.h>
#include <console/console.h>
+#include <smp/spinlock.h>
+
+/* FIXME: unwrapping these header guards breaks builds due to deeper issues */
#if CONFIG_CMOS_POST
#include <pc80/mc146818rtc.h>
-#include <smp/spinlock.h>
#endif
#if CONFIG_CMOS_POST_EXTRA
#include <device/device.h>
#endif
-#include <elog.h>
/* Write POST information */
the following patch was just integrated into master:
commit bd4553bb4c594ff5098fc7c4c85133aab163705e
Author: Mike Loptien <mike.loptien(a)se-eng.com>
Date: Mon Jun 16 10:46:56 2014 -0600
MP Table: Change types to be consistent with the spec
Update the elements in the MP Spec structures with
appropriate types to more accurately reflect the
real sizes of the bit fields in the MP Tables.
Also add a function for PCI I/O interrupts since these are
handled slightly differently than the other I/O interrupt
entries. The src_bus_irq field is defined where
Bits 1-0: PIRQ pin: INT_A# = 0, INT_B# = 1, INT_C# = 2, INT_D# = 3
Bits 2-6: Originating PCI Device Number
Bit 7: Reserved
Change-Id: I693407beaa0ee454f49464e43ed45d8cba3b18fc
Signed-off-by: Mike Loptien <mike.loptien(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6050
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6050 for details.
-gerrit
the following patch was just integrated into master:
commit e96f4b1122fea74b8f9933fcefa1a2d5a616b39f
Author: Martin Roth <martin.roth(a)se-eng.com>
Date: Sun Jun 22 22:05:24 2014 -0600
baytrail_fsp: Fix the mmconf Kconfig
The override value in the mainboard that was removed was correct.
Change-Id: Ie820df0d6b7a713488173240f0c0ca4a9e108f71
Signed-off-by: Martin Roth <martin.roth(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6095
Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/6095 for details.
-gerrit