coreboot-gerrit April 2014

coreboot-gerrit@coreboot.org

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779 discussions

Patch merged into coreboot/master: 48713a1 console: Drop EARLY_CONSOLE option
by gerrit＠coreboot.org 30 Apr '14

30 Apr '14

the following patch was just integrated into master: commit 48713a1bf7c2e55c34609a051b0dee7166c4a017 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Apr 15 18:19:48 2014 +0300 console: Drop EARLY_CONSOLE option We have means to easily disable a specific console in romstage if necessary, so this global option makes little sense. The option was initially introduced as a work-around for build issues around CACHE_AS_RAM, ROMCC and ARCH_ARMV7 dependencies for UARTs. Change-Id: I797bdd11a48ddd813d3ee7ccef9a0c050f16f669 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/5607 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/5607 for details. -gerrit

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Patch merged into coreboot/master: 28837c6 allwinner/a10: Hide SoC specific UART functions
by gerrit＠coreboot.org 30 Apr '14

30 Apr '14

the following patch was just integrated into master: commit 28837c6b014dec37a3b4deeb8407469356b81e05 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Apr 4 20:32:59 2014 +0300 allwinner/a10: Hide SoC specific UART functions If platform has a component coreboot has to communicate with using one of the UARTs, that device would not be part of the SoC and must not use functions specific to a10 UART. Change-Id: Ifacfc94dfde9979eae0b0cfb723a6eaa1fbcd659 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/5469 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/5469 for details. -gerrit

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Patch merged into coreboot/master: 70342a7 uart: Support multiple ports
by gerrit＠coreboot.org 30 Apr '14

30 Apr '14

the following patch was just integrated into master: commit 70342a7f51a0069446966c42db4dbc44f6db16ee Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Mar 14 22:28:29 2014 +0200 uart: Support multiple ports The port for console remains to be a compile time constant. The Kconfig option is changed to select an UART port with index to avoid putting map of UART base addresses in Kconfigs. With this change it is possible to have other than debug console on different UART port. Change-Id: Ie1845a946f8d3b2604ef5404edb31b2e811f3ccd Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/5342 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/5342 for details. -gerrit

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New patch to review for coreboot: f3b67d0 asrock/e350m1/devicetree.cb: Correctly indent device line
by Paul Menzel 29 Apr '14

29 Apr '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5619 -gerrit commit f3b67d0bdbca19dfb8f79c54ef6ce50851fbe244 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Tue Apr 29 23:31:55 2014 +0200 asrock/e350m1/devicetree.cb: Correctly indent device line Fix up commit dfa8a32f [1]. src/mainboard/asrock/e350m1: Properly indent devicetree.cb [1] http://review.coreboot.org/5612 Change-Id: I59b3ec2f00d69951aa8a96c4a9c3de5b219acbfb Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/mainboard/asrock/e350m1/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb index c96e45b..e2096c0 100644 --- a/src/mainboard/asrock/e350m1/devicetree.cb +++ b/src/mainboard/asrock/e350m1/devicetree.cb @@ -19,7 +19,7 @@ chip northbridge/amd/agesa/family14/root_complex device cpu_cluster 0 on chip cpu/amd/agesa/family14 - device lapic 0 on end + device lapic 0 on end end end device domain 0 on

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New patch to review for coreboot: 2e385b3 console: Move UART port defaults to mainboard
by Kyösti Mälkki 29 Apr '14

29 Apr '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5618 -gerrit commit 2e385b38a530b66b171b254c15c27c0407793714 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Apr 29 23:27:32 2014 +0300 console: Move UART port defaults to mainboard Correct selection of UART depends of board layout, not the CPU internals, so default setting should originate from mainboard. Change-Id: Ibf0ab0847ccce73c22704e86983dbe3d24ebc8a0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/allwinner/a10/Kconfig | 4 ---- src/cpu/samsung/exynos5250/Kconfig | 4 ---- src/cpu/samsung/exynos5420/Kconfig | 4 ---- src/mainboard/cubietech/cubieboard/Kconfig | 4 ++++ src/mainboard/google/pit/Kconfig | 4 ++++ src/mainboard/google/snow/Kconfig | 4 ++++ 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index fbb95a1..a04d8a4 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -71,8 +71,4 @@ config SYS_SDRAM_BASE hex default 0x40000000 -config UART_FOR_CONSOLE - int - default 0 - endif # if CPU_ALLWINNER_A10 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 4adc000..86e74a9 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -87,8 +87,4 @@ config SYS_SDRAM_BASE hex default 0x40000000 -config UART_FOR_CONSOLE - int - default 3 - endif diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 3bc7486..8366ea3 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -89,8 +89,4 @@ config SYS_SDRAM_BASE hex default 0x20000000 -config UART_FOR_CONSOLE - int - default 3 - endif diff --git a/src/mainboard/cubietech/cubieboard/Kconfig b/src/mainboard/cubietech/cubieboard/Kconfig index 6cb84cf..5c4c1a1 100644 --- a/src/mainboard/cubietech/cubieboard/Kconfig +++ b/src/mainboard/cubietech/cubieboard/Kconfig @@ -27,4 +27,8 @@ config DRAM_SIZE_MB int default 1024 +config UART_FOR_CONSOLE + int + default 0 + endif # BOARD_CUBIETECH_CUBIEBOARD diff --git a/src/mainboard/google/pit/Kconfig b/src/mainboard/google/pit/Kconfig index e7e9a31..cec4e31 100644 --- a/src/mainboard/google/pit/Kconfig +++ b/src/mainboard/google/pit/Kconfig @@ -47,4 +47,8 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 2 +config UART_FOR_CONSOLE + int + default 3 + endif # BOARD_GOOGLE_PIT diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig index e808eb8..448484d 100644 --- a/src/mainboard/google/snow/Kconfig +++ b/src/mainboard/google/snow/Kconfig @@ -52,4 +52,8 @@ config EC_GOOGLE_CHROMEEC_I2C_BUS hex default 4 +config UART_FOR_CONSOLE + int + default 3 + endif # BOARD_GOOGLE_SNOW

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Patch merged into coreboot/master: a8d089d towiki.sh Move vendor link to the first column.
by gerrit＠coreboot.org 29 Apr '14

29 Apr '14

the following patch was just integrated into master: commit a8d089d3acc0c2254b3dbeb04c1e622ab01e6d98 Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sun Apr 27 20:29:10 2014 +0200 towiki.sh Move vendor link to the first column. It is not easy to see that there are two links, one to coreboot wiki and second to the vendor page. This change moves the vendor page link to the vendor column, separating it nicely. Change-Id: I3063be476231d04f833350043010a6e0001697e7 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Reviewed-on: http://review.coreboot.org/5593 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5593 for details. -gerrit

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Patch merged into coreboot/master: 68eff4f lenovo/{t60, x60}/devicetree.cb: Fix typo in Controller in comment
by gerrit＠coreboot.org 29 Apr '14

29 Apr '14

the following patch was just integrated into master: commit 68eff4fb1cc9e0d83a21e736143ad6ae8c41bc36 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Mon Mar 3 09:18:18 2014 +0100 lenovo/{t60,x60}/devicetree.cb: Fix typo in Controller in comment $ git grep -l Cnotr | xargs sed -i 's/Cnotr/Contr/g' Change-Id: Iee826a8092dbf17f8a28b7eb7b6d183464c6e498 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/5325 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5325 for details. -gerrit

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Patch set updated for coreboot: 7ae6802 src/drivers/pc80: Remove empty struct keyboard
by Edward O'Callaghan 29 Apr '14

29 Apr '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5617 -gerrit commit 7ae6802506fe93c5706c2e964411472ca8f3417f Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Apr 30 05:01:52 2014 +1000 src/drivers/pc80: Remove empty struct keyboard This is a empty struct that has propagated though the superio's & ec's but really does nothing. Time to get rid of it before it adds yet more cruft. However, since this touches many superio's at once we do this in stages by first changing the function type to be a pure procedure. Change-Id: Ibc732e676a9d4f0269114acabc92b15771d27ef2 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/drivers/pc80/keyboard.c | 2 +- src/ec/compal/ene932/ec.c | 5 +---- src/ec/google/chromeec/ec_lpc.c | 5 ++--- src/ec/quanta/ene_kb3940q/ec.c | 4 +--- src/ec/quanta/it8518/ec.c | 5 +---- src/include/pc80/keyboard.h | 2 +- src/superio/fintek/f71863fg/superio.c | 4 +--- src/superio/fintek/f71869ad/superio.c | 4 +--- src/superio/fintek/f71872/superio.c | 4 +--- src/superio/fintek/f71889/superio.c | 4 +--- src/superio/fintek/f81865f/superio.c | 4 +--- src/superio/ite/it8671f/superio.c | 4 +--- src/superio/ite/it8712f/superio.c | 4 +--- src/superio/ite/it8716f/superio.c | 4 +--- src/superio/ite/it8718f/superio.c | 4 +--- src/superio/ite/it8721f/superio.c | 4 +--- src/superio/ite/it8772f/superio.c | 4 +--- src/superio/nsc/pc8374/superio.c | 4 +--- src/superio/nsc/pc87309/superio.c | 4 +--- src/superio/nsc/pc87351/superio.c | 4 +--- src/superio/nsc/pc87360/superio.c | 4 +--- src/superio/nsc/pc87366/superio.c | 4 +--- src/superio/nsc/pc87417/superio.c | 4 +--- src/superio/nsc/pc87427/superio.c | 4 +--- src/superio/nsc/pc97307/superio.c | 4 +--- src/superio/nsc/pc97317/superio.c | 4 +--- src/superio/nuvoton/wpcm450/superio.c | 4 +--- src/superio/renesas/m3885x/superio.c | 4 +--- src/superio/smsc/fdc37m60x/superio.c | 4 +--- src/superio/smsc/fdc37n972/fdc37n972.c | 2 +- src/superio/smsc/kbc1100/superio.c | 4 +--- src/superio/smsc/lpc47b272/superio.c | 4 +--- src/superio/smsc/lpc47b397/superio.c | 4 +--- src/superio/smsc/lpc47m10x/superio.c | 4 +--- src/superio/smsc/lpc47m15x/superio.c | 4 +--- src/superio/smsc/lpc47n227/superio.c | 4 +--- src/superio/smsc/mec1308/superio.c | 4 +--- src/superio/smsc/sch4037/superio.c | 4 +--- src/superio/smsc/sio1036/superio.c | 2 -- src/superio/smsc/sio10n268/sio10n268.c | 2 +- src/superio/smsc/smscsuperio/superio.c | 4 +--- src/superio/winbond/w83627dhg/superio.c | 4 +--- src/superio/winbond/w83627ehg/superio.c | 4 +--- src/superio/winbond/w83627hf/superio.c | 4 +--- src/superio/winbond/w83627thg/superio.c | 4 +--- src/superio/winbond/w83627uhg/superio.c | 4 +--- src/superio/winbond/w83697hf/superio.c | 2 -- src/superio/winbond/w83977f/superio.c | 4 +--- src/superio/winbond/w83977tf/superio.c | 4 +--- 49 files changed, 48 insertions(+), 139 deletions(-) diff --git a/src/drivers/pc80/keyboard.c b/src/drivers/pc80/keyboard.c index 5b68617..6a573d8 100644 --- a/src/drivers/pc80/keyboard.c +++ b/src/drivers/pc80/keyboard.c @@ -193,7 +193,7 @@ static u8 send_keyboard(u8 command) return regval; } -void pc_keyboard_init(struct pc_keyboard *keyboard) +void pc_keyboard_init(void) { u8 retries; u8 regval; diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index 3f4d1b9..e60a0ac 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -133,14 +133,11 @@ static u8 ec_io_read(u16 addr) #ifndef __SMM__ static void ene932_init(device_t dev) { - struct ec_compal_ene932_config *conf = dev->chip_info; - - if (!dev->enabled) return; printk(BIOS_DEBUG, "Compal ENE932: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index a445da8..5f377c9 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -138,11 +138,10 @@ int google_chromeec_command(struct chromeec_command *cec_command) #ifndef __SMM__ static void lpc_ec_init(device_t dev) { - struct ec_google_chromeec_config *conf = dev->chip_info; - if (!dev->enabled) return; - pc_keyboard_init(&conf->keyboard); + + pc_keyboard_init(); google_chromeec_init(); } diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 137aa81..57854d0 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -141,13 +141,11 @@ static void ene_kb3940q_log_events(void) static void ene_kb3940q_init(device_t dev) { - struct ec_quanta_ene_kb3940q_config *conf = dev->chip_info; - if (!dev->enabled) return; printk(BIOS_DEBUG, "Quanta EnE KB3940Q: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); ene_kb3940q_log_events(); } diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 6516cee..7588a1e 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -162,14 +162,11 @@ void ec_it8518_enable_wake_events(void) #ifndef __SMM__ static void it8518_init(device_t dev) { - struct ec_quanta_it8518_config *conf = dev->chip_info; - - if (!dev->enabled) return; printk(BIOS_DEBUG, "Quanta IT8518: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } diff --git a/src/include/pc80/keyboard.h b/src/include/pc80/keyboard.h index ce281bb..5f97723 100644 --- a/src/include/pc80/keyboard.h +++ b/src/include/pc80/keyboard.h @@ -5,7 +5,7 @@ struct pc_keyboard { /* No initialization parameters for now */ }; -void pc_keyboard_init(struct pc_keyboard *keyboard); +void pc_keyboard_init(void); void set_kbc_ps2_mode(void); #endif /* PC80_KEYBOARD_H */ diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c index 29b5ab3..11bfbec 100644 --- a/src/superio/fintek/f71863fg/superio.c +++ b/src/superio/fintek/f71863fg/superio.c @@ -24,12 +24,10 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" #include "f71863fg.h" static void f71863fg_init(device_t dev) { - struct superio_fintek_f71863fg_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -39,7 +37,7 @@ static void f71863fg_init(device_t dev) /* TODO: Might potentially need code for HWM or FDC etc. */ case F71863FG_KBC: res0 = find_resource(dev, PNP_IDX_IO0); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c index 11ad6f8..db3c5c9 100644 --- a/src/superio/fintek/f71869ad/superio.c +++ b/src/superio/fintek/f71869ad/superio.c @@ -25,12 +25,10 @@ #include <console/console.h> #include <stdlib.h> -#include "chip.h" #include "f71869ad.h" static void f71869ad_init(device_t dev) { - struct superio_fintek_f71869ad_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void f71869ad_init(device_t dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71869AD_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c index 55a11b1..fb7cd72 100644 --- a/src/superio/fintek/f71872/superio.c +++ b/src/superio/fintek/f71872/superio.c @@ -24,12 +24,10 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" #include "f71872.h" static void f71872_init(device_t dev) { - struct superio_fintek_f71872_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +35,7 @@ static void f71872_init(device_t dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71872_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71889/superio.c b/src/superio/fintek/f71889/superio.c index 71edafc..3b6f3eb 100644 --- a/src/superio/fintek/f71889/superio.c +++ b/src/superio/fintek/f71889/superio.c @@ -24,12 +24,10 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" #include "f71889.h" static void f71889_init(device_t dev) { - struct superio_fintek_f71889_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +35,7 @@ static void f71889_init(device_t dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71889_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c index 85ac7ba..32828d3 100644 --- a/src/superio/fintek/f81865f/superio.c +++ b/src/superio/fintek/f81865f/superio.c @@ -24,12 +24,10 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" #include "f81865f.h" static void f81865f_init(device_t dev) { - struct superio_fintek_f81865f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +35,7 @@ static void f81865f_init(device_t dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F81865F_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/ite/it8671f/superio.c b/src/superio/ite/it8671f/superio.c index 21c70ec..9da8f1d 100644 --- a/src/superio/ite/it8671f/superio.c +++ b/src/superio/ite/it8671f/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8671f.h" static void init(device_t dev) { - struct superio_ite_it8671f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) case IT8671F_PP: /* TODO. */ break; case IT8671F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8671F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c index 2fd3440..769afe3 100644 --- a/src/superio/ite/it8712f/superio.c +++ b/src/superio/ite/it8712f/superio.c @@ -24,7 +24,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8712f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -44,7 +43,6 @@ static void pnp_exit_ext_func_mode(device_t dev) static void it8712f_init(device_t dev) { - struct superio_ite_it8712f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -58,7 +56,7 @@ static void it8712f_init(device_t dev) break; case IT8712F_KBCK: set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8712F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c index 8cf3c5f..bd89a32 100644 --- a/src/superio/ite/it8716f/superio.c +++ b/src/superio/ite/it8716f/superio.c @@ -27,7 +27,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8716f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -76,7 +75,6 @@ static void init_ec(u16 base) static void it8716f_init(device_t dev) { - struct superio_ite_it8716f_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -90,7 +88,7 @@ static void it8716f_init(device_t dev) init_ec(res0->base + EC_INDEX_PORT); break; case IT8716F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index 998d271..d40407a 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8718f.h" static void init(device_t dev) { - struct superio_ite_it8718f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -40,7 +38,7 @@ static void init(device_t dev) case IT8718F_EC: /* TODO. */ break; case IT8718F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8718F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8721f/superio.c b/src/superio/ite/it8721f/superio.c index 300a480..66e6ef7 100644 --- a/src/superio/ite/it8721f/superio.c +++ b/src/superio/ite/it8721f/superio.c @@ -23,12 +23,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8721f.h" static void init(device_t dev) { - struct superio_ite_it8721f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -41,7 +39,7 @@ static void init(device_t dev) case IT8721F_EC: /* TODO. */ break; case IT8721F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8721F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index e7e82a8..cc69e41 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -23,7 +23,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8772f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -133,7 +132,6 @@ static void it8772f_enable_fan(struct resource *res, int fan) static void it8772f_init(device_t dev) { - struct superio_ite_it8772f_config *conf = dev->chip_info; struct resource *res; if (!dev->enabled) @@ -177,7 +175,7 @@ static void it8772f_init(device_t dev) case IT8772F_KBCK: if (!conf->skip_keyboard) { set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } break; case IT8772F_KBCM: diff --git a/src/superio/nsc/pc8374/superio.c b/src/superio/nsc/pc8374/superio.c index 71cde2c..8b6f1ca 100644 --- a/src/superio/nsc/pc8374/superio.c +++ b/src/superio/nsc/pc8374/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc8374.h" static void init(device_t dev) { - struct superio_nsc_pc8374_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC8374_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c index 52fc14f..f374e6a 100644 --- a/src/superio/nsc/pc87309/superio.c +++ b/src/superio/nsc/pc87309/superio.c @@ -23,19 +23,17 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87309.h" static void init(device_t dev) { - struct superio_nsc_pc87309_config *conf = dev->chip_info; if (!dev->enabled) return; switch (dev->path.pnp.device) { case PC87309_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87351/superio.c b/src/superio/nsc/pc87351/superio.c index 4d9469e..7f395b4 100644 --- a/src/superio/nsc/pc87351/superio.c +++ b/src/superio/nsc/pc87351/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87351.h" static void init(device_t dev) { - struct superio_nsc_pc87351_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87351_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c index 92731e7..a53cc35 100644 --- a/src/superio/nsc/pc87360/superio.c +++ b/src/superio/nsc/pc87360/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87360.h" static void init(device_t dev) { - struct superio_nsc_pc87360_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87360_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c index 1874ab3..27bdd6e 100644 --- a/src/superio/nsc/pc87366/superio.c +++ b/src/superio/nsc/pc87366/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87366.h" static void init(device_t dev) { - struct superio_nsc_pc87366_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87366_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 3b91f36..99882a5 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -27,19 +27,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87417.h" static void init(device_t dev) { - struct superio_nsc_pc87417_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87417_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c index ae02f01..0f6fa14 100644 --- a/src/superio/nsc/pc87427/superio.c +++ b/src/superio/nsc/pc87427/superio.c @@ -25,19 +25,17 @@ #include <console/console.h> #include <string.h> #include <stdlib.h> -#include "chip.h" #include "pc87427.h" static void init(device_t dev) { - struct superio_nsc_pc87427_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87427_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc97307/superio.c b/src/superio/nsc/pc97307/superio.c index c1cd5c1..2a2bb1f 100644 --- a/src/superio/nsc/pc97307/superio.c +++ b/src/superio/nsc/pc97307/superio.c @@ -23,12 +23,10 @@ #include <device/device.h> #include <device/pnp.h> #include <stdlib.h> -#include "chip.h" #include "pc97307.h" static void init(device_t dev) { - struct superio_nsc_pc97307_config *conf = dev->chip_info; u8 reg8; if (!dev->enabled) @@ -40,7 +38,7 @@ static void init(device_t dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard. */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case PC97307_FDC: /* Set up floppy in PS/2 mode. */ diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index a69dfe7..467805a 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -23,12 +23,10 @@ #include <device/device.h> #include <device/pnp.h> #include <stdlib.h> -#include "chip.h" #include "pc97317.h" static void init(device_t dev) { - struct superio_nsc_pc97317_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -39,7 +37,7 @@ static void init(device_t dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; default: break; diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c index fabb546..ff815cf 100644 --- a/src/superio/nuvoton/wpcm450/superio.c +++ b/src/superio/nuvoton/wpcm450/superio.c @@ -25,19 +25,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "wpcm450.h" static void init(device_t dev) { - struct superio_nuvoton_wpcm450_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case WPCM450_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/renesas/m3885x/superio.c b/src/superio/renesas/m3885x/superio.c index 34d7d11..26a7071 100644 --- a/src/superio/renesas/m3885x/superio.c +++ b/src/superio/renesas/m3885x/superio.c @@ -25,20 +25,18 @@ #include <string.h> #include <assert.h> #include <stdlib.h> -#include "chip.h" void m3885_configure_multikey(void); static void m3885x_init(device_t dev) { - struct superio_renesas_m3885x_config *conf = dev->chip_info; if (!dev->enabled) return; printk(BIOS_DEBUG, "Renesas M3885x: Initializing keyboard.\n"); set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); m3885_configure_multikey(); } diff --git a/src/superio/smsc/fdc37m60x/superio.c b/src/superio/smsc/fdc37m60x/superio.c index 92a1783..f5626ee 100644 --- a/src/superio/smsc/fdc37m60x/superio.c +++ b/src/superio/smsc/fdc37m60x/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "fdc37m60x.h" static void init(device_t dev) { - struct superio_smsc_fdc37m60x_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) case FDC37M60X_PP: /* TODO. */ break; case FDC37M60X_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case FDC37M60X_AUX: /* TODO. */ break; diff --git a/src/superio/smsc/fdc37n972/fdc37n972.c b/src/superio/smsc/fdc37n972/fdc37n972.c index cab4540..a5d1163 100644 --- a/src/superio/smsc/fdc37n972/fdc37n972.c +++ b/src/superio/smsc/fdc37n972/fdc37n972.c @@ -37,7 +37,7 @@ static void init(device_t dev) case FDC37N972_PP: /* TODO. */ break; case FDC37N972_KBDC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; // [..] The rest: TODO } diff --git a/src/superio/smsc/kbc1100/superio.c b/src/superio/smsc/kbc1100/superio.c index 3a834a0..77777d0 100644 --- a/src/superio/smsc/kbc1100/superio.c +++ b/src/superio/smsc/kbc1100/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "kbc1100.h" /* Forward declarations */ @@ -60,7 +59,6 @@ static void enable_dev(device_t dev) static void kbc1100_init(device_t dev) { - struct superio_smsc_kbc1100_config *conf = dev->chip_info; struct resource *res0, *res1; @@ -74,7 +72,7 @@ static void kbc1100_init(device_t dev) case KBC1100_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c index fb39c28..30e89a8 100644 --- a/src/superio/smsc/lpc47b272/superio.c +++ b/src/superio/smsc/lpc47b272/superio.c @@ -32,7 +32,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47b272.h" /* Forward declarations */ @@ -85,14 +84,13 @@ static void enable_dev(device_t dev) */ static void lpc47b272_init(device_t dev) { - struct superio_smsc_lpc47b272_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47B272_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index 3d81350..8a6c03e 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -29,7 +29,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47b397.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -56,14 +55,13 @@ static void enable_hwm_smbus(device_t dev) static void lpc47b397_init(device_t dev) { - struct superio_smsc_lpc47b397_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47B397_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index 1a697f2..a9583e4 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -31,7 +31,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47m10x.h" /* Forward declarations */ @@ -84,14 +83,13 @@ static void enable_dev(device_t dev) */ static void lpc47m10x_init(device_t dev) { - struct superio_smsc_lpc47m10x_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47M10X2_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index b142dde..91e77ba 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47m15x.h" /* Forward declarations */ @@ -65,14 +64,13 @@ static void enable_dev(device_t dev) static void lpc47m15x_init(device_t dev) { - struct superio_smsc_lpc47m15x_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47M15X_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index eda2622..e65d74d 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <assert.h> #include <stdlib.h> -#include "chip.h" #include "lpc47n227.h" /* Forward declarations. */ @@ -128,7 +127,6 @@ void lpc47n227_pnp_enable(device_t dev) */ static void lpc47n227_init(device_t dev) { - struct superio_smsc_lpc47n227_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -136,7 +134,7 @@ static void lpc47n227_init(device_t dev) switch (dev->path.pnp.device) { case LPC47N227_KBDC: printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c index 448800e..54d99fb 100644 --- a/src/superio/smsc/mec1308/superio.c +++ b/src/superio/smsc/mec1308/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "mec1308.h" #if CONFIG_HAVE_ACPI_RESUME #include <arch/acpi.h> @@ -36,7 +35,6 @@ static void mec1308_init(device_t dev) { - struct superio_smsc_mec1308_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -47,7 +45,7 @@ static void mec1308_init(device_t dev) if (acpi_slp_type == 3) return; #endif - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c index b7f100a..35df431 100644 --- a/src/superio/smsc/sch4037/superio.c +++ b/src/superio/smsc/sch4037/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "sch4037.h" /* Forward declarations */ @@ -61,7 +60,6 @@ static void enable_dev(device_t dev) static void sch4037_init(device_t dev) { - struct superio_smsc_sch4037_config *conf = dev->chip_info; struct resource *res0, *res1; if (!dev->enabled) { @@ -73,7 +71,7 @@ static void sch4037_init(device_t dev) case SCH4037_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/sio1036/superio.c b/src/superio/smsc/sio1036/superio.c index 4980803..7fac79c 100644 --- a/src/superio/smsc/sio1036/superio.c +++ b/src/superio/smsc/sio1036/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "sio1036.h" /* Forward declarations */ @@ -60,7 +59,6 @@ static void enable_dev(device_t dev) static void sio1036_init(device_t dev) { - struct superio_smsc_sio1036_config *conf = dev->chip_info; struct resource *res0, *res1; diff --git a/src/superio/smsc/sio10n268/sio10n268.c b/src/superio/smsc/sio10n268/sio10n268.c index 690c160..6fb6e57 100644 --- a/src/superio/smsc/sio10n268/sio10n268.c +++ b/src/superio/smsc/sio10n268/sio10n268.c @@ -38,7 +38,7 @@ static void init(device_t dev) break; case SIO10N268_KBDC: /* TODO: This is still hardcoded. */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; // [..] The rest: TODO } diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 9990aa2..0d62a9a 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -41,7 +41,6 @@ #include <console/console.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" /* The following Super I/O chips are currently supported by this driver: */ #define LPC47M172 0x14 @@ -150,7 +149,6 @@ static const struct logical_devices { */ static void smsc_init(device_t dev) { - struct superio_smsc_smscsuperio_config *conf = dev->chip_info; int i, ld; /* Do not initialize disabled devices. */ @@ -169,7 +167,7 @@ static void smsc_init(device_t dev) /* A Super I/O was found, so initialize the respective device. */ ld = dev->path.pnp.device; if (ld == logical_device_table[i].devs[LD_KBC]) { - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } } diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 269e57c..fdab974 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -23,7 +23,6 @@ #include <superio/conf_mode.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83627dhg.h" static void w83627dhg_enable_UR2(device_t dev) @@ -39,7 +38,6 @@ static void w83627dhg_enable_UR2(device_t dev) static void w83627dhg_init(device_t dev) { - struct superio_winbond_w83627dhg_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -49,7 +47,7 @@ static void w83627dhg_init(device_t dev) w83627dhg_enable_UR2(dev); break; case W83627DHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index 62d3311..aae0ac4 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -30,7 +30,6 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83627ehg.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -95,7 +94,6 @@ static void init_hwm(u16 base) static void w83627ehg_init(device_t dev) { - struct superio_winbond_w83627ehg_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -103,7 +101,7 @@ static void w83627ehg_init(device_t dev) switch(dev->path.pnp.device) { case W83627EHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case W83627EHG_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index c881743..5445b47 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -30,7 +30,6 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83627hf.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -102,7 +101,6 @@ static void init_hwm(u16 base) static void w83627hf_init(device_t dev) { - struct superio_winbond_w83627hf_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -110,7 +108,7 @@ static void w83627hf_init(device_t dev) switch(dev->path.pnp.device) { case W83627HF_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case W83627HF_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index f6aba10..75186fa 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -27,19 +27,17 @@ #include <console/console.h> #include <string.h> #include <pc80/keyboard.h> -#include "chip.h" #include "w83627thg.h" static void w83627thg_init(device_t dev) { - struct superio_winbond_w83627thg_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83627THG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index 5775ff5..f0d9aef 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -27,7 +27,6 @@ #include <stdint.h> #include <stdlib.h> #include <pc80/keyboard.h> -#include "chip.h" #include "w83627uhg.h" /* @@ -60,7 +59,6 @@ static void set_uart_clock_source(device_t dev, u8 uart_clock) static void w83627uhg_init(device_t dev) { - struct superio_winbond_w83627uhg_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -85,7 +83,7 @@ static void w83627uhg_init(device_t dev) set_uart_clock_source(dev, 0); break; case W83627UHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83697hf/superio.c b/src/superio/winbond/w83697hf/superio.c index f896078..64394ec 100644 --- a/src/superio/winbond/w83697hf/superio.c +++ b/src/superio/winbond/w83697hf/superio.c @@ -27,7 +27,6 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83697hf.h" static void hwmon_set_fan_divisor(unsigned int base, int num, unsigned int divisor) { @@ -52,7 +51,6 @@ static void hwmon_set_fan_divisor(unsigned int base, int num, unsigned int divis static void w83697hf_init(device_t dev) { struct resource *res0; - struct superio_winbond_w83697hf_config *cfg; if (!dev->enabled) return; diff --git a/src/superio/winbond/w83977f/superio.c b/src/superio/winbond/w83977f/superio.c index 32ecf18..232f46a 100644 --- a/src/superio/winbond/w83977f/superio.c +++ b/src/superio/winbond/w83977f/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83977f.h" static void w83977f_init(device_t dev) { - struct superio_winbond_w83977f_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83977F_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index 7f2dffb..a61770a 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -28,19 +28,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83977tf.h" static void w83977tf_init(device_t dev) { - struct superio_winbond_w83977tf_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83977TF_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } }

1 0

Patch merged into coreboot/master: b67e9a1 crossgcc: Support OSX 10.9 built-in tar utility program.
by gerrit＠coreboot.org 29 Apr '14

29 Apr '14

the following patch was just integrated into master: commit b67e9a1acd82fec30235c69f717a0103f245667a Author: Andrew Wu <arw(a)dmp.com.tw> Date: Mon Apr 28 18:13:44 2014 +0800 crossgcc: Support OSX 10.9 built-in tar utility program. Unlike OSX 10.8, OSX 10.9 doesn't provide GNU tar program, and built-in tar program is bsdtar 2.8.3. bsdtar can build crossgcc toolchain. Modify buildgcc to support tar in OSX 10.9 (uname = Darwin). Change-Id: I093898f8f99e29918387f9b275a30af461a7e1be Signed-off-by: Andrew Wu <arw(a)dmp.com.tw> Reviewed-on: http://review.coreboot.org/5598 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5598 for details. -gerrit

1 0

Patch set updated for coreboot: cde1c91 Introduce stage-specific architecture for coreboot
by Furquan Shaikh 29 Apr '14

29 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5577 -gerrit commit cde1c91d4802bf834bc85ac5efceb603db31f3c2 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Apr 23 10:18:48 2014 -0700 Introduce stage-specific architecture for coreboot Make all three coreboot stages (bootblock, romstage and ramstage) aware of the architecture specific to that stage i.e. we will have CONFIG_ARCH variables for each of the three stages. This allows us to have an SOC with any combination of architectures and thus every stage can be made to run on a completely different architecture independent of others. Thus, bootblock can have an x86 arch whereas romstage and ramstage can have arm32 and arm64 arch respectively. These arch specific options can be considered as either arch or modes eg: x86 running in different modes or ARM having different arch types (v4, v7, v8). In addition to different architectures/modes per stage, a separate binary arch is introduced to help to indentify the arch of CBFS binaries. Also, for now this arch type is used at places which are not clearly part of any of the above stages (eg seabios and others). The original CONFIG_ARCH variable is thus removed and replaced by CONFIG_BINARY_ARCH. Ultimate goal is to get rid of all the occurences of CONFIG_BINARY_ARCH and when we understand the arch for currently not-so-sure components. However, the general idea is that CONFIG_BINARY_ARCH should be declared as the topmost arch of the SoC or the arch which is actually responsible for loading the kernel. In order to meet these requirements, changes have been made to CC, LD, OBJCOPY and family to add CC_bootblock, CC_romstage, CC_ramstage, CC_binary and similarly others. Few additional macros have been introduced to identify the class to be used at various points, e.g.: CC_$(class) derives the $(class) part from the name of the stage being compiled. Conflicts: src/arch/armv7/Makefile.inc src/arch/x86/Makefile.inc Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile | 90 +++++++++++++++++++++-------- Makefile.inc | 66 +++++++++++++-------- src/Kconfig | 51 ++++++++++++---- src/arch/armv7/Makefile.inc | 50 ++++++++++------ src/arch/x86/Kconfig | 4 +- src/arch/x86/Makefile.inc | 83 ++++++++++++++++---------- src/arch/x86/boot/Makefile.inc | 8 +++ src/arch/x86/lib/Makefile.inc | 21 +++++-- src/console/Kconfig | 2 +- src/cpu/Kconfig | 6 +- src/cpu/Makefile.inc | 4 +- src/cpu/allwinner/a10/Kconfig | 5 +- src/cpu/amd/agesa/Kconfig | 5 +- src/cpu/amd/geode_gx1/Kconfig | 5 +- src/cpu/amd/geode_gx2/Kconfig | 5 +- src/cpu/amd/geode_lx/Kconfig | 5 +- src/cpu/amd/model_10xxx/Kconfig | 5 +- src/cpu/amd/model_fxx/Kconfig | 5 +- src/cpu/amd/sc520/Kconfig | 5 +- src/cpu/armltd/cortex-a9/Kconfig | 5 +- src/cpu/dmp/vortex86ex/Kconfig | 5 +- src/cpu/intel/ep80579/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/cpu/intel/haswell/Kconfig | 5 +- src/cpu/intel/haswell/Makefile.inc | 6 +- src/cpu/intel/model_1067x/Kconfig | 5 +- src/cpu/intel/model_106cx/Kconfig | 5 +- src/cpu/intel/model_2065x/Kconfig | 5 +- src/cpu/intel/model_206ax/Kconfig | 5 +- src/cpu/intel/model_65x/Kconfig | 5 +- src/cpu/intel/model_67x/Kconfig | 5 +- src/cpu/intel/model_68x/Kconfig | 5 +- src/cpu/intel/model_69x/Kconfig | 5 +- src/cpu/intel/model_6bx/Kconfig | 5 +- src/cpu/intel/model_6dx/Kconfig | 5 +- src/cpu/intel/model_6ex/Kconfig | 5 +- src/cpu/intel/model_6fx/Kconfig | 5 +- src/cpu/intel/model_6xx/Kconfig | 5 +- src/cpu/intel/model_f0x/Kconfig | 5 +- src/cpu/intel/model_f1x/Kconfig | 5 +- src/cpu/intel/model_f2x/Kconfig | 5 +- src/cpu/intel/model_f3x/Kconfig | 5 +- src/cpu/intel/model_f4x/Kconfig | 5 +- src/cpu/qemu-x86/Kconfig | 5 +- src/cpu/samsung/exynos5250/Kconfig | 5 +- src/cpu/samsung/exynos5420/Kconfig | 5 +- src/cpu/ti/am335x/Kconfig | 5 +- src/cpu/ti/am335x/Makefile.inc | 4 +- src/cpu/via/c3/Kconfig | 5 +- src/cpu/via/c7/Kconfig | 5 +- src/cpu/via/nano/Kconfig | 5 +- src/cpu/x86/Makefile.inc | 6 +- src/cpu/x86/smm/Makefile.inc | 26 ++++----- src/device/Kconfig | 8 +-- src/device/Makefile.inc | 2 +- src/device/device.c | 4 +- src/device/oprom/include/io.h | 2 +- src/device/oprom/yabel/compat/functions.c | 2 +- src/device/oprom/yabel/device.h | 8 +-- src/device/oprom/yabel/io.c | 2 +- src/drivers/Makefile.inc | 2 +- src/drivers/pc80/mc146818rtc.c | 2 +- src/drivers/uart/Kconfig | 4 +- src/ec/google/chromeec/Kconfig | 2 +- src/lib/Makefile.inc | 8 +-- src/lib/cbfs_core.c | 2 +- src/lib/coreboot_table.c | 2 +- src/mainboard/advansus/a785e-i/Makefile.inc | 2 +- src/mainboard/asus/m5a88-v/Makefile.inc | 2 +- src/mainboard/avalue/eax-785e/Makefile.inc | 2 +- src/mainboard/bifferos/bifferboard/Kconfig | 5 +- src/mainboard/packardbell/ms2290/Kconfig | 5 +- src/soc/intel/baytrail/Kconfig | 5 +- src/superio/Makefile.inc | 2 +- src/vendorcode/amd/agesa/f10/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f12/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f14/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15tn/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f16kb/Makefile.inc | 5 +- src/vendorcode/amd/cimx/rd890/Makefile.inc | 6 +- src/vendorcode/amd/cimx/sb700/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb800/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb900/Makefile.inc | 5 +- src/vendorcode/google/chromeos/Makefile.inc | 17 +++--- src/vendorcode/intel/Makefile.inc | 5 +- 87 files changed, 532 insertions(+), 233 deletions(-) diff --git a/Makefile b/Makefile index b709d14..c97caca 100644 --- a/Makefile +++ b/Makefile @@ -113,33 +113,74 @@ else include $(HAVE_DOTCONFIG) -ARCHDIR-$(CONFIG_ARCH_ARMV7) := armv7 -ARCHDIR-$(CONFIG_ARCH_X86) := x86 +# Each stage of coreboot can have a different arch. For this we need separate +# config vars +# bootblock arch +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_ARMV7) := armv7 +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_X86_32) := i386 -ARCH-y := $(ARCHDIR-y) +# romstage arch +ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_ARMV7) := armv7 +ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_X86_32) := i386 -# If architecture folder name is different from GCC binutils architecture name, -# override here. -ARCH-$(CONFIG_ARCH_ARMV7) := armv7 -ARCH-$(CONFIG_ARCH_X86) := i386 +# ramstage arch +ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_ARMV7) := armv7 +ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_X86_32) := i386 -ifneq ($(INNER_SCANBUILD),y) -CC := $(CC_$(ARCH-y)) -endif -CPP := $(CPP_$(ARCH-y)) -AS := $(AS_$(ARCH-y)) -LD := $(LD_$(ARCH-y)) -NM := $(NM_$(ARCH-y)) -OBJCOPY := $(OBJCOPY_$(ARCH-y)) -OBJDUMP := $(OBJDUMP_$(ARCH-y)) -READELF := $(READELF_$(ARCH-y)) -STRIP := $(STRIP_$(ARCH-y)) -AR := $(AR_$(ARCH-y)) +# overall binary arch +ARCH-BINARY-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-BINARY-$(CONFIG_ARCH_BINARY_X86_32) := i386 -CFLAGS += $(CFLAGS_$(ARCH-y)) +ARCHDIR-armv7 := armv7 +ARCHDIR-i386 := x86 -LIBGCC_FILE_NAME := $(shell test -r `$(CC) -print-libgcc-file-name` && \ - $(CC) -print-libgcc-file-name) +# If architecture folder name is different from GCC binutils architecture name, +# override here. +ARCH-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-$(CONFIG_ARCH_BINARY_X86_32) := i386 + +# Since there can be a different arch for each stage, we can have a different cc +# for each stage +CC_bootblock := $(CC_$(ARCH-BOOTBLOCK-y)) +CC_romstage := $(CC_$(ARCH-ROMSTAGE-y)) +CC_ramstage := $(CC_$(ARCH-RAMSTAGE-y)) +CC_binary := $(CC_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different nm +# for each stage +NM_bootblock := $(NM_$(ARCH-BOOTBLOCK-y)) +NM_romstage := $(NM_$(ARCH-ROMSTAGE-y)) +NM_ramstage := $(NM_$(ARCH-RAMSTAGE-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different +# objcopy for each stage +OBJCOPY_bootblock := $(OBJCOPY_$(ARCH-BOOTBLOCK-y)) +OBJCOPY_romstage := $(OBJCOPY_$(ARCH-ROMSTAGE-y)) +OBJCOPY_ramstage := $(OBJCOPY_$(ARCH-RAMSTAGE-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) + +# CFLAGS +CFLAGS_bootblock += $(CFLAGS_$(ARCH-BOOTBLOCK-y)) +CFLAGS_romstage += $(CFLAGS_$(ARCH-ROMSTAGE-y)) +CFLAGS_ramstage += $(CFLAGS_$(ARCH-RAMSTAGE-y)) +CFLAGS_binary += $(CFLAGS_$(ARCH-BINARY-y)) + +AS_binary := $(AS_$(ARCH-BINARY-y)) +LD_binary := $(LD_$(ARCH-BINARY-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) +OBJDUMP_binary := $(OBJDUMP_$(ARCH-BINARY-y)) +READELF_binary := $(READELF_$(ARCH-BINARY-y)) +STRIP_binary := $(STRIP_$(ARCH-BINARY-y)) +AR_binary := $(AR_$(ARCH-BINARY-y)) + +LIBGCC_FILE_NAME_bootblock := $(shell test -r `$(CC_bootblock) -print-libgcc-file-name` && \ + $(CC_bootblock) -print-libgcc-file-name) +LIBGCC_FILE_NAME_romstage := $(shell test -r `$(CC_romstage) -print-libgcc-file-name` && \ + $(CC_romstage) -print-libgcc-file-name) +LIBGCC_FILE_NAME_ramstage := $(shell test -r `$(CC_ramstage) -print-libgcc-file-name` && \ + $(CC_ramstage) -print-libgcc-file-name) ifneq ($(INNER_SCANBUILD),y) ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) @@ -264,7 +305,8 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$< + $(eval cc-class := $(call find-class-comm,$(class))) + $(CC_$(cc-class)) $(3) -MMD $$$$(CFLAGS_$(cc-class)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef @@ -285,7 +327,7 @@ printall: @echo alldirs:=$(alldirs) @echo allsrcs=$(allsrcs) @echo DEPENDENCIES=$(DEPENDENCIES) - @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME) + @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME_$(class)) @$(foreach class,$(special-classes),echo $(class):='$($(class))'; ) endif diff --git a/Makefile.inc b/Makefile.inc index ba73d98..1cd77fb 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -65,7 +65,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool -subdirs-y += src/arch/$(ARCHDIR-y) +subdirs-y += src/arch/armv7 src/arch/x86 subdirs-y += src/mainboard/$(MAINBOARDDIR) subdirs-y += site-local @@ -105,7 +105,7 @@ files-in-dir=$(filter-out $(call dir-wildcards,$(call filter-out-dirs,$(1),$(dir # reduce command line length by linking the objects of each # directory into an intermediate file ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \ - $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD) -o $$@ -r $$^ ) \ + $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_binary) -o $$@ -r $$^ ) \ $(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs)))) romstage-c-ccopts:=-D__PRE_RAM__ @@ -146,10 +146,10 @@ smm-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-y)/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c - $(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex endef @@ -168,7 +168,7 @@ cbfs-files-processor-nvramtool= \ # arg2: binary file name cbfs-files-processor-vsa= \ $(eval $(2): $(1) ; \ - printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) + printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY_binary) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD_binary) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) ####################################################################### # Add handler for arbitrary files in CBFS @@ -211,19 +211,29 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include +INCLUDES := -Isrc -Isrc/include -I$(obj) INCLUDES += -Isrc/device/oprom/include # abspath is a workaround for romcc INCLUDES += -include $(src)/include/kconfig.h -CFLAGS = $(INCLUDES) -Os -pipe -g -nostdinc -CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -CFLAGS += -Wstrict-aliasing -Wshadow +INCLUDES_binary := -Isrc/arch/$(ARCHDIR-$(ARCH-BINARY-y))/include +INCLUDES_bootblock := -Isrc/arch/$(ARCHDIR-$(ARCH-BOOTBLOCK-y))/include +INCLUDES_romstage := -Isrc/arch/$(ARCHDIR-$(ARCH-ROMSTAGE-y))/include +INCLUDES_ramstage := -Isrc/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include + +CFLAGS_common = $(INCLUDES) -Os -pipe -g -nostdinc +CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wstrict-aliasing -Wshadow ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y) -CFLAGS += -Werror +CFLAGS_common += -Werror endif -CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer +CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer + +CFLAGS_binary = $(CFLAGS_common) $(INCLUDES_binary) +CFLAGS_bootblock = $(CFLAGS_common) $(INCLUDES_bootblock) +CFLAGS_romstage = $(CFLAGS_common) $(INCLUDES_romstage) +CFLAGS_ramstage = $(CFLAGS_common) $(INCLUDES_ramstage) additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \ $(objutil)/ifdfake $(objutil)/options @@ -245,9 +255,9 @@ $(obj)/build.h: .xcompile printf "#define COREBOOT_BUILD_WEEKDAY_BCD 0x`LANG= date +"%w"`\n" >> $(obj)/build.ht printf "#define COREBOOT_DMI_DATE \"`LANG= date +"%m/%d/%Y"`\"\n" >> $(obj)/build.ht printf "\n" >> $(obj)/build.ht - printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD_binary) --version | head -n1)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_BY \"$(subst \,@,$(shell PATH=$$PATH:/usr/ucb whoami))\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_HOST \"$(shell hostname -s 2>/dev/null || hostname 2>/dev/null)\"\n" >> $(obj)/build.ht @@ -315,15 +325,15 @@ $(objutil)/%.o: $(objutil)/%.c $(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(CFLAGS) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -D__PRE_RAM__ $(CFLAGS) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< ####################################################################### # Clean up rules @@ -339,7 +349,7 @@ clean-for-update-target: rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.* rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC)" LD="$(LD)" + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC_binary)" LD="$(LD_binary)" clean-target: rm -f $(obj)/coreboot* @@ -412,16 +422,22 @@ tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/ # Common recipes for all stages ######################################################################################################################################################################## +find-class = $(if $(filter $(1),$(basename $(1))),$(1),$(call find-class,$(basename $(1)))) + +find-class-comm = $(if $(CC_$(call find-class,$(1))),$(call find-class,$(1)),binary) + $(objcbfs)/%.bin: $(objcbfs)/%.elf + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_$(class)) -O binary $< $@ $(objcbfs)/%.elf: $(objcbfs)/%.debug + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + $(NM_$(class)) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_$(class)) --strip-debug $@.tmp + $(OBJCOPY_$(class)) --add-gnu-debuglink=$< $@.tmp mv $@.tmp $@ ######################################################################################################################################################################## @@ -550,10 +566,10 @@ cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) bootsplash.jpg-type := bootsplash -ifeq ($(CONFIG_ARCH_ARMV7),y) +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) ROMSTAGE_ELF := romstage.elf endif -ifeq ($(CONFIG_ARCH_X86),y) +ifeq ($(CONFIG_ARCH_BINARY_X86_32),y) ROMSTAGE_ELF := romstage_xip.elf endif diff --git a/src/Kconfig b/src/Kconfig index 6356b19..96d38f2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -228,22 +228,50 @@ source src/mainboard/Kconfig # This option is used to set the architecture of a mainboard to X86. # It is usually set in mainboard/*/Kconfig. -config ARCH_X86 +config ARCH_BINARY_X86_32 bool default n select PCI -config ARCH_ARMV7 +config ARCH_BINARY_ARMV7 bool default n +# This option is used to set the architecture of bootblock stage +config ARCH_BOOTBLOCK_ARMV7 + bool + default n + +config ARCH_BOOTBLOCK_X86_32 + bool + default n + +# This option is used to set the architecture of romstage stage +config ARCH_ROMSTAGE_ARMV7 + bool + default n + +config ARCH_ROMSTAGE_X86_32 + bool + default n + +# This option is used to set the architecture of ramstage stage +config ARCH_RAMSTAGE_ARMV7 + bool + default n + +config ARCH_RAMSTAGE_X86_32 + bool + default n + + # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_X86 +if ARCH_BINARY_X86_32 source src/arch/x86/Kconfig endif -if ARCH_ARMV7 +if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig endif @@ -334,7 +362,7 @@ config TIMER_QUEUE config COOP_MULTITASKING def_bool n - depends on TIMER_QUEUE && ARCH_X86 + depends on TIMER_QUEUE && ARCH_BINARY_X86_32 help Cooperative multitasking allows callbacks to be multiplexed on the main thread of ramstage. With this enabled it allows for multiple @@ -433,7 +461,7 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM by the board and/or chipset. config HAVE_REFCODE_BLOB - depends on ARCH_X86 + depends on ARCH_BINARY_X86_32 bool "An external reference code blob should be put into cbfs." default n help @@ -518,7 +546,7 @@ config GENERATE_PIRQ_TABLE If unsure, say Y. config GENERATE_SMBIOS_TABLES - depends on ARCH_X86 + depends on ARCH_BINARY_X86_32 bool "Generate SMBIOS tables" default y help @@ -532,8 +560,8 @@ menu "Payload" choice prompt "Add a payload" - default PAYLOAD_NONE if !ARCH_X86 - default PAYLOAD_SEABIOS if ARCH_X86 + default PAYLOAD_NONE if !ARCH_BINARY_X86_32 + default PAYLOAD_SEABIOS if ARCH_BINARY_X86_32 config PAYLOAD_NONE bool "None" @@ -567,7 +595,7 @@ config PAYLOAD_LINUX config PAYLOAD_SEABIOS bool "SeaBIOS" - depends on ARCH_X86 + depends on ARCH_BINARY_X86_32 help Select this option if you want to build a coreboot image with a SeaBIOS payload. If you don't know what this is @@ -1115,7 +1143,8 @@ config POWER_BUTTON_IS_OPTIONAL config REG_SCRIPT bool - default y if ARCH_X86 + default y if ARCH_BINARY_X86_32 default n help Internal option that controls whether we compile in register scripts. + diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index a419dcd..241ecb5 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -32,6 +32,7 @@ subdirs-y += lib/ # ARM specific options ################################################################################ +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) CBFSTOOL_PRE_OPTS = -b 0 @@ -40,20 +41,23 @@ stages_o = $(obj)/arch/armv7/stages.o $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -I. $(INCLUDES) -c -o $@ $< -marm + $(CC_binary) -I. $(INCLUDES) $(INCLUDES_binary) -c -o $@ $< -marm -CFLAGS += \ +CFLAGS_common += \ -ffixed-r8\ -march=armv7-a\ -marm\ -mno-unaligned-access\ -mthumb\ -mthumb-interwork +endif # CONFIG_ARCH_BINARY_ARMV7 ################################################################################ # Bootblock ################################################################################ +ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y) + bootblock-y += cache.c bootblock-y += eabi_compat.c bootblock-y += memset.S @@ -81,31 +85,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_bootblock) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ + $(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \ -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ + $(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_bootblock) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group endif +endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y) + romstage-y += cache.c romstage-y += div0.c romstage-y += eabi_compat.c @@ -132,9 +140,9 @@ crt0s += $(cpu_incs-y) $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions @@ -149,21 +157,24 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_ARMV7 ################################################################################ # Ramstage ################################################################################ -# Things that appear in every board +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y) + ramstage-y += exception.c ramstage-y += exception_asm.S ramstage-y += div0.c @@ -183,17 +194,17 @@ ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld + $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< endif -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) +$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) @@ -220,3 +231,4 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c endif +endif # CONFIG_ARCH_RAMSTAGE_ARMV7 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8854e6b..73cd05e 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -13,14 +13,14 @@ config X86_ARCH_OPTIONS config AP_IN_SIPI_WAIT bool default n - depends on ARCH_X86 && SMP + depends on ARCH_BINARY_X86_32 && SMP # Aligns 16bit entry code in bootblock so that hyper-threading CPUs # can boot AP CPUs to enable their shared caches. config SIPI_VECTOR_IN_ROM bool default n - depends on ARCH_X86 + depends on ARCH_BINARY_X86_32 config RAMBASE hex diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 79caabd..6190060 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -53,8 +53,10 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE)) mbi.bin-type := mbi +ifeq ($(CONFIG_ARCH_BINARY_X86_32),y) CBFSTOOL_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) CBFSTOOL_PRE_OPTS = -b $(shell cat $(objcbfs)/base_xip.txt) +endif ################################################################################ # i386 specific tools @@ -75,6 +77,8 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l # Build the bootblock +ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y) + bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds @@ -114,31 +118,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC_bootblock) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ + $(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< + $(CC_bootblock) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< endif +endif # CONFIG_ARCH_BOOTBLOCK_X86_32 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) + crt0s = $(src)/arch/x86/init/prologue.inc ldscripts = ldscripts += $(src)/arch/x86/init/romstage.ld @@ -170,14 +178,26 @@ else ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE endif +$(objcbfs)/romstage_%.bin: $(objcbfs)/romstage_%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY_romstage) -O binary $< $@ + +$(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM_romstage) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_romstage) --strip-debug $@.tmp + $(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" @@ -195,21 +215,21 @@ romstage-libs ?= $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_null.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif - $(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ + $(NM_romstage) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ echo "Forbidden global variables in romstage:"; \ - $(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ + $(NM_romstage) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ else true; fi $(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_xip.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions @@ -238,16 +258,20 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_X86_32 ################################################################################ # Ramstage ################################################################################ +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) + ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) @@ -305,30 +329,31 @@ else $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld + $(LD_ramstage) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< endif endif -$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) +$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $$(ramstage-libs) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif +endif # CONFIG_ARCH_RAMSTAGE_X86_32 ################################################################################ seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ - AS="$(AS)" CPP="$(CPP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ + AS="$(AS_binary)" CPP="$(CPP)" \ CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ @@ -337,8 +362,8 @@ seabios: filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) @@ -346,6 +371,6 @@ filo: grub2: $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER) diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 928fc03..a6f914c 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -1,6 +1,13 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) + romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c romstage-$(CONFIG_BROKEN_CAR_MIGRATE) += cbmem.c +endif # CONFIG_ARCH_ROMSTAGE_X86_32 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) + ramstage-y += boot.c ramstage-y += gdt.c ramstage-y += tables.c @@ -14,3 +21,4 @@ ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S $(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h +endif # CONFIG_ARCH_RAMSTAGE_X86_32 \ No newline at end of file diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index 8b7418b..0a3a575 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -1,3 +1,16 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) + +romstage-y += cbfs_and_run.c +romstage-y += memset.c +romstage-y += memcpy.c +romstage-y += memmove.c +romstage-y += rom_media.c + +endif # CONFIG_ARCH_ROMSTAGE_X86_32 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) + ramstage-y += c_start.S ramstage-y += cpu.c ramstage-y += pci_ops_conf1.c @@ -12,12 +25,6 @@ ramstage-y += rom_media.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S -romstage-y += cbfs_and_run.c -romstage-y += memset.c -romstage-y += memcpy.c -romstage-y += memmove.c -romstage-y += rom_media.c - smm-y += memset.c smm-y += memcpy.c smm-y += memmove.c @@ -26,3 +33,5 @@ smm-y += rom_media.c rmodules-y += memset.c rmodules-y += memcpy.c rmodules-y += memmove.c + +endif # CONFIG_ARCH_RAMSTAGE_X86_32 \ No newline at end of file diff --git a/src/console/Kconfig b/src/console/Kconfig index 65fc1aa..c3d88a2 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -2,7 +2,7 @@ menu "Console" config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on ARCH_ARMV7 + depends on ARCH_BINARY_ARMV7 default n help Use console during the bootblock if supported diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 6fced37..e1f5a8b 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -14,7 +14,7 @@ source src/cpu/via/Kconfig source src/cpu/qemu-x86/Kconfig source src/cpu/x86/Kconfig -if ARCH_X86 +if ARCH_BINARY_X86_32 config CACHE_AS_RAM bool @@ -62,7 +62,7 @@ config SSE2 streaming SIMD instructions. Some parts of coreboot can be built with more efficient code if SSE2 instructions are available. -endif # ARCH_X86 +endif # ARCH_BINARY_X86_32 config SUPPORT_CPU_UCODE_IN_CBFS bool @@ -80,7 +80,7 @@ config CPU_MICROCODE_ADDED_DURING_BUILD default y if CPU_MICROCODE_CBFS_GENERATE || CPU_MICROCODE_CBFS_EXTERNAL choice - prompt "Include CPU microcode in CBFS" if ARCH_X86 + prompt "Include CPU microcode in CBFS" if ARCH_BINARY_X86_32 default CPU_MICROCODE_CBFS_GENERATE if SUPPORT_CPU_UCODE_IN_CBFS default CPU_MICROCODE_CBFS_NONE if !SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index f206fdc..e66585b 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -42,13 +42,13 @@ endif # final microcode file. $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs) @printf " LD $(subst $(obj)/,,$(@))\n" - $(LD) -static --entry=0 $+ -o $@ + $(LD_binary) -static --entry=0 $+ -o $@ # We have a lot of useless data in the large blob, and we are only interested in # the data section, so we only copy that part to the final microcode file $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o @printf " MICROCODE $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -j .data -O binary $< $@ + $(OBJCOPY_binary) -j .data -O binary $< $@ ifeq ($(cbfs_include_ucode),y) # Add CPU microcode to specified rom image $(1) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index f76a7b6..0e13f94 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -6,7 +6,10 @@ if CPU_ALLWINNER_A10 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index fa36f38..a247d93 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -26,7 +26,10 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_TN default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER diff --git a/src/cpu/amd/geode_gx1/Kconfig b/src/cpu/amd/geode_gx1/Kconfig index b87e8bc..8e99952 100644 --- a/src/cpu/amd/geode_gx1/Kconfig +++ b/src/cpu/amd/geode_gx1/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX1 bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 if CPU_AMD_GEODE_GX1 diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig index b96c770..c68ee66 100644 --- a/src/cpu/amd/geode_gx2/Kconfig +++ b/src/cpu/amd/geode_gx2/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX2 bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 if CPU_AMD_GEODE_GX2 diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index 6aceab2..1c8f9e5 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_GEODE_LX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 if CPU_AMD_GEODE_LX diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 30c2486..661df49 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_10XXX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SSE select SSE2 select MMCONF_SUPPORT_DEFAULT diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 1a811f4..3a8f71b 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_FXX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select MMX select SSE select SSE2 diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig index 46377be..aac8709 100644 --- a/src/cpu/amd/sc520/Kconfig +++ b/src/cpu/amd/sc520/Kconfig @@ -1,3 +1,6 @@ config CPU_AMD_SC520 bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig index f46c6ff..b354444 100644 --- a/src/cpu/armltd/cortex-a9/Kconfig +++ b/src/cpu/armltd/cortex-a9/Kconfig @@ -1,6 +1,9 @@ config CPU_ARMLTD_CORTEX_A9 bool - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select EARLY_CONSOLE default n diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig index aea8889..e070730 100644 --- a/src/cpu/dmp/vortex86ex/Kconfig +++ b/src/cpu/dmp/vortex86ex/Kconfig @@ -19,5 +19,8 @@ config CPU_DMP_VORTEX86EX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select UDELAY_TSC diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig index fa96f8d..0dafc51 100644 --- a/src/cpu/intel/ep80579/Kconfig +++ b/src/cpu/intel/ep80579/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_EP80579 bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SSE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 22d01e6..ba555a2 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -28,7 +28,10 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 1ea9c2a..b4d18c3 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -9,4 +9,4 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c cpu_incs += $(src)/cpu/intel/fsp_model_206ax/cache_as_ram.inc -CC := $(CC) -I$(CONFIG_MICROCODE_INCLUDE_PATH) +CC := $(CC_binary) -I$(CONFIG_MICROCODE_INCLUDE_PATH) diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 97309ae..74483b9 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -6,7 +6,10 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select BACKUP_DEFAULT_SMM_REGION select SMP select SSE2 diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 63c1939..e504a68 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -26,14 +26,14 @@ rmodules-y += sipi_vector.S rmodules-y += sipi_header.c $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_DOTO), 0)) $(SIPI_BIN): $(SIPI_ELF).rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 4d6add6..399eace 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_1067X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index ea6f5ca..6a40a77 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_106CX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 4c7456d..c65c17f 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -5,7 +5,10 @@ if CPU_INTEL_MODEL_2065X config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE select SSE2 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 64b2a0a..3cc5b8f 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -8,7 +8,10 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index b3fa7bd..53d6cdc 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_65X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 7558bc2..6d7affe 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_67X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 670163a..1933bb2 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -20,6 +20,9 @@ config CPU_INTEL_MODEL_68X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_69x/Kconfig b/src/cpu/intel/model_69x/Kconfig index e4a0e6c..337b77f 100644 --- a/src/cpu/intel/model_69x/Kconfig +++ b/src/cpu/intel/model_69x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_69X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 4dc6fe6..cc92e3e 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6BX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig index e6d5f1e..05fb426 100644 --- a/src/cpu/intel/model_6dx/Kconfig +++ b/src/cpu/intel/model_6dx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6DX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index eee864d..ed7bd1b 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6EX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index b8de303..5c1d346 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6FX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index 49cfe2d..91710ae 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6XX bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig index 2ed68d1..d1100d8 100644 --- a/src/cpu/intel/model_f0x/Kconfig +++ b/src/cpu/intel/model_f0x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F0X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig index 3bdb7f6..13e655d 100644 --- a/src/cpu/intel/model_f1x/Kconfig +++ b/src/cpu/intel/model_f1x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F1X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 62393a8..d8c01de 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F2X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 5c9d0a3..af2c82a 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F3X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 849dcd0..6c90e42 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F4X bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index e54e4db..fddfd08 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,4 +19,7 @@ config CPU_QEMU_X86 bool - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index b8042e3..3dbfef7 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5250 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 6207adf..ab86349 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5420 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index 22a02ad..5432c24 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -1,5 +1,8 @@ config CPU_TI_AM335X - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index 5b10bd8..2017371 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -28,14 +28,14 @@ get_header_size= \ $(obj)/omap-header.bin: $$(omap-header-objs) $$(header_ld) $(obj)/coreboot.rom @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -include $(obj)/config.h \ + $(CC_binary) -nostdlib -nostartfiles -static -include $(obj)/config.h \ -Wl,--defsym,header_load_size=$(strip \ $(call get_header_size,$(obj)/coreboot.rom, \ $(CONFIG_CBFS_PREFIX)/romstage \ ) \ ) \ -o $@.tmp $< -T $(header_ld) - $(OBJCOPY) --only-section=".header" -O binary $@.tmp $@ + $(OBJCOPY_binary) --only-section=".header" -O binary $@.tmp $@ $(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin @printf " HEADER $(subst $(obj)/,,$(@))\n" diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig index 566f07c..97189e6 100644 --- a/src/cpu/via/c3/Kconfig +++ b/src/cpu/via/c3/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C3 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select UDELAY_TSC select MMX select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig index d5f1a41..fd86da5 100644 --- a/src/cpu/via/c7/Kconfig +++ b/src/cpu/via/c7/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C7 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig index 0f4f994..0f58717 100644 --- a/src/cpu/via/nano/Kconfig +++ b/src/cpu/via/nano/Kconfig @@ -24,7 +24,10 @@ if CPU_VIA_NANO config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 514d96c..bc6a116 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -16,13 +16,13 @@ endif rmodules-$(CONFIG_PARALLEL_MP) += sipi_vector.S $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_ELF:.elf=.o), 0)) $(SIPI_BIN): $(SIPI_RMOD) - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 9720630..2d31f07 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -32,32 +32,32 @@ ramstage-srcs += $(obj)/cpu/x86/smm/smmstub # SMM Stub Module. The stub is used as a trampoline for relocation and normal # SMM handling. $(obj)/cpu/x86/smm/smmstub.o: $$(smmstub-objs) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the SMM stub module with a 0-byte heap. $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0)) $(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smmstub.ramstage.o: $(obj)/cpu/x86/smm/smmstub @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) # C-based SMM handler. -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smm.elf, $(obj)/cpu/x86/smm/smm.o, $(CONFIG_SMM_MODULE_HEAP_SIZE))) $(obj)/cpu/x86/smm/smm: $(obj)/cpu/x86/smm/smm.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smm.ramstage.o: $(obj)/cpu/x86/smm/smm @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) else # CONFIG_SMM_MODULES @@ -79,18 +79,18 @@ endif smm-y += smihandler.c -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions - $(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o - $(NM) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map - $(OBJCOPY) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm + $(CC_ramstage) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o + $(NM_ramstage) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map + $(OBJCOPY_ramstage) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm # change to the target path because objcopy will use the path name in its # ELF symbol names. $(obj)/cpu/x86/smm/smm_wrap.ramstage.o: $(obj)/cpu/x86/smm/smm_wrap @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(obj)/cpu/x86/smm; $(OBJCOPY) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o + cd $(obj)/cpu/x86/smm; $(OBJCOPY_ramstage) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o endif # CONFIG_SMM_MODULES diff --git a/src/device/Kconfig b/src/device/Kconfig index 932b4de..61db304 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -91,14 +91,14 @@ config ON_DEVICE_ROM_RUN choice prompt "Option ROM execution type" - default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 - default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 + default PCI_OPTION_ROM_RUN_YABEL if !ARCH_BINARY_X86_32 + default PCI_OPTION_ROM_RUN_REALMODE if ARCH_BINARY_X86_32 depends on VGA_ROM_RUN || GEODE_VSA config PCI_OPTION_ROM_RUN_REALMODE prompt "Native mode" bool - depends on ARCH_X86 + depends on ARCH_BINARY_X86_32 help If you select this option, PCI Option ROMs will be executed natively on the CPU in real mode. No CPU emulation is involved, @@ -161,7 +161,7 @@ config YABEL_VIRTMEM_LOCATION config YABEL_DIRECTHW prompt "Direct hardware access" bool - depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 + depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_BINARY_X86_32 help YABEL consists of two parts: It uses x86emu for the CPU emulation and additionally provides a PC system emulation that filters bad device diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index bd41b12..ad4ecc1 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -9,7 +9,7 @@ ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c -ramstage-$(CONFIG_ARCH_X86) += pnp_device.c +ramstage-$(CONFIG_ARCH_BINARY_X86_32) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-$(CONFIG_PCI) += pci_early.c ramstage-y += smbus_ops.c diff --git a/src/device/device.c b/src/device/device.c index e068cee..114ebed 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -40,7 +40,7 @@ #include <stdlib.h> #include <string.h> #include <smp/spinlock.h> -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 #include <arch/ebda.h> #endif #include <timer.h> @@ -1189,7 +1189,7 @@ void dev_initialize(void) printk(BIOS_INFO, "Initializing devices...\n"); -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 /* Ensure EBDA is prepared before Option ROMs. */ setup_default_ebda(); #endif diff --git a/src/device/oprom/include/io.h b/src/device/oprom/include/io.h index 96dd572..5864332 100644 --- a/src/device/oprom/include/io.h +++ b/src/device/oprom/include/io.h @@ -1,4 +1,4 @@ -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 #include <arch/io.h> #else void outb(u8 val, u16 port); diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 2c3dc33..60a31e5 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -48,7 +48,7 @@ unsigned long tb_freq = 0; u64 get_time(void) { u64 act = 0; -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 u32 eax, edx; __asm__ __volatile__( diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index 017aab9..cdd3e50 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -128,7 +128,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr); static inline void out32le(void *addr, u32 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86_32 || CONFIG_ARCH_BINARY_ARMV7 *((u32*) addr) = cpu_to_le32(val); #else asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -139,7 +139,7 @@ static inline u32 in32le(void *addr) { u32 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86_32 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le32(*((u32 *) addr)); #else asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr)); @@ -150,7 +150,7 @@ in32le(void *addr) static inline void out16le(void *addr, u16 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86_32 || CONFIG_ARCH_BINARY_ARMV7 *((u16*) addr) = cpu_to_le16(val); #else asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -161,7 +161,7 @@ static inline u16 in16le(void *addr) { u16 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86_32 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le16(*((u16*) addr)); #else asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr)); diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 94f610d..e6844be 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -26,7 +26,7 @@ #include <device/resource.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 #include <arch/io.h> #else // these are not used, only needed for linking, must be overridden using X86emu_setupPioFuncs diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index f11e4b8..d3659f7 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -37,4 +37,4 @@ subdirs-y += ti subdirs-y += ipmi subdirs-y += elog subdirs-y += xpowers -subdirs-$(CONFIG_ARCH_X86) += pc80 +subdirs-$(CONFIG_ARCH_BINARY_X86_32) += pc80 diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index 51cd6c3..7d77a3f 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -52,7 +52,7 @@ static void rtc_set_checksum(int range_start, int range_end, int cks_loc) } #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 #define RTC_CONTROL_DEFAULT (RTC_24H) #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ) #else diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index a979437..9e8b8b8 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -5,9 +5,9 @@ config DRIVERS_UART config DRIVERS_UART_8250IO bool "Serial port on SuperIO" - depends on !ARCH_ARMV7 + depends on !ARCH_BINARY_ARMV7 default n if NO_UART_ON_SUPERIO - default y if ARCH_X86 + default y if ARCH_BINARY_X86_32 # Select this for mainboard without SuperIO serial port. config NO_UART_ON_SUPERIO diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 342db3e..9620a58 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -21,7 +21,7 @@ config EC_GOOGLE_CHROMEEC_I2C_CHIP default 0x1e config EC_GOOGLE_CHROMEEC_LPC - depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. + depends on EC_GOOGLE_CHROMEEC && ARCH_BINARY_X86_32 # Needs Plug-and-play. def_bool y help Google Chrome EC via LPC bus. diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f8cf3b1..014f8a6 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,7 +56,7 @@ romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c endif -romstage-$(CONFIG_ARCH_X86) += gcc.c +romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c @@ -83,7 +83,7 @@ ramstage-y += cbfs.c ramstage-y += lzma.c #ramstage-y += lzmadecode.c ramstage-y += stack.c -ramstage-$(CONFIG_ARCH_X86) += gcc.c +ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -143,8 +143,8 @@ RMODULE_LDFLAGS := -nostartfiles -Wl,--emit-relocs -Wl,-z,defs -Wl,-Bsymbolic - # rmdoule is named $(1).rmod define rmodule_link $(strip $(1)): $(strip $(2)) $$(RMODULE_LDSCRIPT) $$(obj)/ldoptions $$(RMODTOOL) - $$(CC) $$(CFLAGS) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME) -Wl,--end-group - $$(NM) -n $$@ > $$(basename $$(a)).map + $$(CC_ramstage) $$(CFLAGS_ramstage) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group + $$(NM_ramstage) -n $$@ > $$(basename $$(a)).map $(strip $(1)).rmod: $(strip $(1)) $$(RMODTOOL) -i $$^ -o $$@ diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c index 50c037e..495b52d 100644 --- a/src/lib/cbfs_core.c +++ b/src/lib/cbfs_core.c @@ -118,7 +118,7 @@ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) // TODO Add a "size" in CBFS header for a platform independent way to // determine the end of CBFS data. -#if defined(CONFIG_ARCH_X86) && CONFIG_ARCH_X86 +#if defined(CONFIG_ARCH_BINARY_X86_32) && CONFIG_ARCH_BINARY_X86_32 romsize -= htonl(header->bootblocksize); #endif DEBUG("CBFS location: 0x%x~0x%x, align: %d\n", offset, romsize, align); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 8e7f85d..a134617 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -38,7 +38,7 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/gnvs.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86_32 #include <cpu/x86/mtrr.h> #endif diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/advansus/a785e-i/Makefile.inc +++ b/src/mainboard/advansus/a785e-i/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/asus/m5a88-v/Makefile.inc +++ b/src/mainboard/asus/m5a88-v/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/avalue/eax-785e/Makefile.inc +++ b/src/mainboard/avalue/eax-785e/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/bifferos/bifferboard/Kconfig b/src/mainboard/bifferos/bifferboard/Kconfig index 4ee9958..160ff8f 100644 --- a/src/mainboard/bifferos/bifferboard/Kconfig +++ b/src/mainboard/bifferos/bifferboard/Kconfig @@ -2,7 +2,10 @@ if BOARD_BIFFEROS_BIFFERBOARD config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select ROMCC select BOARD_ROMSIZE_KB_128 select NORTHBRIDGE_RDC_R8610 diff --git a/src/mainboard/packardbell/ms2290/Kconfig b/src/mainboard/packardbell/ms2290/Kconfig index 114c1a8..53f3e3f 100644 --- a/src/mainboard/packardbell/ms2290/Kconfig +++ b/src/mainboard/packardbell/ms2290/Kconfig @@ -2,7 +2,10 @@ if BOARD_PACKARDBELL_MS2290 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select NORTHBRIDGE_INTEL_NEHALEM select SOUTHBRIDGE_INTEL_IBEXPEAK select HAVE_OPTION_TABLE diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1b3ee05..4823d04 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -8,7 +8,10 @@ if SOC_INTEL_BAYTRAIL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86_32 + select ARCH_BOOTBLOCK_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 select CACHE_MRC_SETTINGS select CAR_MIGRATION select COLLECT_TIMESTAMPS diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc index e34fa89..9f94ec2 100644 --- a/src/superio/Makefile.inc +++ b/src/superio/Makefile.inc @@ -28,4 +28,4 @@ subdirs-y += smsc subdirs-y += via subdirs-y += winbond -ramstage-$(CONFIG_ARCH_X86) += common/conf_mode.c +ramstage-$(CONFIG_ARCH_BINARY_X86_32) += common/conf_mode.c diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index 203efab..177302c 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -48,5 +48,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index e1bafbe..4c5ec84 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -86,5 +86,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### \ No newline at end of file diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc index f457277..509b3ad 100644 --- a/src/vendorcode/amd/agesa/f14/Makefile.inc +++ b/src/vendorcode/amd/agesa/f14/Makefile.inc @@ -67,7 +67,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 2a7acce..d8ee520 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -529,5 +529,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 00ace78..ee174bf 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -91,7 +91,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 0e68895..4d497f1 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -98,5 +98,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index feeb2cd..491f810 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -113,7 +113,11 @@ NB_CIMX_CFLAGS = export CIMX_ROOT export NB_CIMX_INC export NB_CIMX_CFLAGS -CC := $(CC) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) + +CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_binary := $(CC_binary) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index 10d03e6..24e7ce1 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -72,7 +72,10 @@ SB_CIMX_CFLAGS = export CIMX_ROOT export SB_CIMX_INC export SB_CIMX_CFLAGS -CC := $(CC) $(SB_CIMX_CFLAGS) $(SB_CIMX_INC) +CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC) +CC_romstage := $(CC_romstage) $(SB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC) +CC_binary := $(CC_binary) $(SB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc index 3fb1d54..553ebae 100644 --- a/src/vendorcode/amd/cimx/sb800/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc @@ -79,7 +79,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 4a3417f..e26a0fe 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -82,7 +82,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 21e1750..1c4a267 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -19,9 +19,9 @@ romstage-y += chromeos.c ramstage-y += chromeos.c -romstage-$(CONFIG_ARCH_X86) += vbnv.c -ramstage-$(CONFIG_ARCH_X86) += vbnv.c -romstage-$(CONFIG_ARCH_X86) += vboot.c +romstage-$(CONFIG_ARCH_BINARY_X86_32) += vbnv.c +ramstage-$(CONFIG_ARCH_BINARY_X86_32) += vbnv.c +romstage-$(CONFIG_ARCH_BINARY_X86_32) += vboot.c ramstage-y += gnvs.c romstage-y += fmap.c ramstage-y += fmap.c @@ -33,9 +33,9 @@ romstage-srcs += src/mainboard/$(MAINBOARDDIR)/chromeos.c endif ifeq ($(MOCK_TPM),1) -CFLAGS += -DMOCK_TPM=1 +CFLAGS_common += -DMOCK_TPM=1 else -CFLAGS += -DMOCK_TPM=0 +CFLAGS_common += -DMOCK_TPM=0 endif ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) @@ -43,7 +43,7 @@ romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a -VB_FIRMWARE_ARCH := $(ARCHDIR-y) +VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-BINARY-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. @@ -62,11 +62,11 @@ VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memcpy.rmodules.o VBOOT_STUB_DEPS += $(VB_LIB) # Remove the '-include' option since that will break vboot's build and ensure # vboot_reference can get to coreboot's include files. -VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS))) +VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS_binary))) VBOOT_CFLAGS += -DVBOOT_DEBUG $(VBOOT_STUB_DOTO): $(VBOOT_STUB_DEPS) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_binary) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the vbootstub module with a 64KiB-byte heap. $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) @@ -75,6 +75,7 @@ $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) $(VB_LIB): @printf " MAKE $(subst $(obj)/,,$(@))\n" $(Q)FIRMWARE_ARCH=$(VB_FIRMWARE_ARCH) \ + CC="$(CC_binary)" \ CFLAGS="$(VBOOT_CFLAGS)" \ make -C $(VB_SOURCE) \ BUILD=../$(dir $(VB_LIB)) \ diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc index 8569af0..79c648d 100644 --- a/src/vendorcode/intel/Makefile.inc +++ b/src/vendorcode/intel/Makefile.inc @@ -23,5 +23,8 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c) FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) ramstage-y += $(FSP_C_INPUTS) -CC := $(CC) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_binary := $(CC_binary) -Isrc/vendorcode/intel/$(FSP_PATH)include endif

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coreboot-gerrit April 2014