coreboot-gerrit March 2014

coreboot-gerrit@coreboot.org

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584 discussions

Patch merged into coreboot/master: fb9ada4 coreboot: don't return struct lb_memory * from write_tables()
by gerrit＠coreboot.org 03 Mar '14

03 Mar '14

the following patch was just integrated into master: commit fb9ada4cab5509cc60ebd60e9a6629a1fc737450 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 18 19:36:05 2014 -0600 coreboot: don't return struct lb_memory * from write_tables() No one is interrogating the write_tables() return value. Therefore, drop it. Change-Id: I97e707f071942239c9a0fa0914af3679ee7a9c3c Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/5301 for details. -gerrit

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Patch merged into coreboot/master: 9f8f264 nehalem: Remove SSKPD.
by gerrit＠coreboot.org 03 Mar '14

03 Mar '14

the following patch was just integrated into master: commit 9f8f2647ccad5fef4be5afeff3a791f4f124e0fd Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Feb 19 22:10:03 2014 +0100 nehalem: Remove SSKPD. Not really used and conflicts with SSKPD from i915_regs.h Change-Id: I1462457f656310df99e78aee8cbfe0206f6e2a1e Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> See http://review.coreboot.org/5268 for details. -gerrit

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Patch merged into coreboot/master: 67f0176 qemu: Support textmode gfx init.
by gerrit＠coreboot.org 03 Mar '14

03 Mar '14

the following patch was just integrated into master: commit 67f017615a0d918942f52c5a16cc9855f5ef4368 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Feb 22 10:35:45 2014 +0100 qemu: Support textmode gfx init. Change-Id: I8b6b14b4fcf8df21d8bbf988d640b1efa013bd7f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> See http://review.coreboot.org/5283 for details. -gerrit

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Patch merged into coreboot/master: 4912208 devices: Allow to configure textmode in native gfx init.
by gerrit＠coreboot.org 03 Mar '14

03 Mar '14

the following patch was just integrated into master: commit 49122087056d4d7c6627f70831f0b03b09b7a2de Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Feb 22 10:34:47 2014 +0100 devices: Allow to configure textmode in native gfx init. Usefull to select between text mode which offers best compatibility with payloads and gfx mode which makes the best-looking screen. Also right now we have an unfortunate situation when qemu is in gfx mode while most real systems use text mode. Change-Id: Ifad7ba197875edfdd06eb932afeb5800229ef055 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> See http://review.coreboot.org/5282 for details. -gerrit

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Patch set updated for coreboot: 4e17f3a nehalem: Replace video init.
by Vladimir Serbinenko 03 Mar '14

03 Mar '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5270 -gerrit commit 4e17f3a4079fee030998bb8b4656d5547ff2d82d Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Feb 19 22:18:08 2014 +0100 nehalem: Replace video init. Old video init just replayed the sequence. This one actually computes the values. Change-Id: Ic1fe7a2e90dc2cc36ac0d8bcea5cfabc583f09a3 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/drivers/intel/gma/i915_reg.h | 5 + src/mainboard/lenovo/x201/Kconfig | 1 + src/mainboard/lenovo/x201/devicetree.cb | 4 + src/northbridge/intel/nehalem/Kconfig | 1 + src/northbridge/intel/nehalem/chip.h | 5 + src/northbridge/intel/nehalem/fake_vbios.c | 1819 ---------------------------- src/northbridge/intel/nehalem/gma.c | 466 ++++++- 7 files changed, 470 insertions(+), 1831 deletions(-) diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index 8c08d9f..61b909d 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -4049,6 +4049,11 @@ #define PCH_LVDS 0xe1180 #define LVDS_DETECTED (1 << 1) +#define LVDS_BORDER_ENABLE (1 << 15) +#define LVDS_PORT_ENABLE (1 << 31) +#define LVDS_CLOCK_A_POWERUP_ALL (3 << 8) +#define LVDS_CLOCK_B_POWERUP_ALL (3 << 4) +#define LVDS_CLOCK_BOTH_POWERUP_ALL (3 << 2) /* vlv has 2 sets of panel control regs. */ #define PIPEA_PP_STATUS 0x61200 diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig index 8e7ebae..860a953 100644 --- a/src/mainboard/lenovo/x201/Kconfig +++ b/src/mainboard/lenovo/x201/Kconfig @@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 6c5229b..9053f89 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -35,6 +35,10 @@ chip northbridge/intel/nehalem register "gpu_panel_power_backlight_off_delay" = "2500" register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a" + register "gpu_use_spread_spectrum_clock" = "1" + register "gpu_lvds_dual_channel" = "0" + register "gpu_link_frequency_270_mhz" = "1" + register "gpu_lvds_num_lanes" = "4" chip ec/lenovo/pmh7 device pnp ff.1 on # dummy diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 69d0eee..4cbaf22 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -23,6 +23,7 @@ config NORTHBRIDGE_INTEL_NEHALEM select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select VGA + select INTEL_EDID if NORTHBRIDGE_INTEL_NEHALEM diff --git a/src/northbridge/intel/nehalem/chip.h b/src/northbridge/intel/nehalem/chip.h index 3164035..95f8b5f 100644 --- a/src/northbridge/intel/nehalem/chip.h +++ b/src/northbridge/intel/nehalem/chip.h @@ -38,5 +38,10 @@ struct northbridge_intel_nehalem_config { u32 gpu_cpu_backlight; /* CPU Backlight PWM value */ u32 gpu_pch_backlight; /* PCH Backlight PWM value */ + + int gpu_use_spread_spectrum_clock; + int gpu_lvds_dual_channel; + int gpu_link_frequency_270_mhz; + int gpu_lvds_num_lanes; }; diff --git a/src/northbridge/intel/nehalem/fake_vbios.c b/src/northbridge/intel/nehalem/fake_vbios.c deleted file mode 100644 index 5daf5ff..0000000 --- a/src/northbridge/intel/nehalem/fake_vbios.c +++ /dev/null @@ -1,1819 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Vladimir Serbinenko. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* This is a replay-based init for nehalem video. */ - -outb(0x23, 0x03c2); // Device I/O <-- -outb(0x02, 0x03da); // Device I/O <-- -inb(0x03c2); // Device I/O --> 10 -outb(0x01, 0x03da); // Device I/O <-- -inb(0x03c2); // Device I/O --> 10 -outl(0x00070080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00070180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00071180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00002900 -outl(0x8000298e, 0x1044); // Device I/O -outl(0x0007019c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0007119c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x000fc008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc020, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc038, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc408, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc420, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc438, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc450, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outw(0x0018, 0x03ce); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x01000001, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f048, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000001, 0x1044); // Device I/O -outl(0x0004f058, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x00042004, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x02000000, 0x1044); // Device I/O -outl(0x000fd034, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 39cfffe0 -outl(0x8421ffe0, 0x1044); // Device I/O -int i; -for (i = 0; i < 0x1fff; i++) { - outl(0x00000001 | (i << 2), 0x1040); // Device I/O - outl(0xc2000001 | (i << 12), 0x1044); // Device I/O -} - -outw(0x0302, 0x03c4); // Device I/O -outw(0x0003, 0x03c4); // Device I/O -outw(0x0204, 0x03c4); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0300, 0x03c4); // Device I/O -outb(0x67, 0x03c2); // Device I/O <-- -outb(0x11, 0x03d4); // Device I/O <-- -inw(0x03d4); // Device I/O --> 0x0011 -outw(0x0011, 0x03d4); // Device I/O -outw(0x5f00, 0x03d4); // Device I/O -outw(0x4f01, 0x03d4); // Device I/O -outw(0x5002, 0x03d4); // Device I/O -outw(0x8203, 0x03d4); // Device I/O -outw(0x5504, 0x03d4); // Device I/O -outw(0x8105, 0x03d4); // Device I/O -outw(0xbf06, 0x03d4); // Device I/O -outw(0x1f07, 0x03d4); // Device I/O -outw(0x0008, 0x03d4); // Device I/O -outw(0x4f09, 0x03d4); // Device I/O -outw(0x0d0a, 0x03d4); // Device I/O -outw(0x0e0b, 0x03d4); // Device I/O -outw(0x000c, 0x03d4); // Device I/O -outw(0x000d, 0x03d4); // Device I/O -outw(0x000e, 0x03d4); // Device I/O -outw(0x000f, 0x03d4); // Device I/O -outw(0x9c10, 0x03d4); // Device I/O -outw(0x8e11, 0x03d4); // Device I/O -outw(0x8f12, 0x03d4); // Device I/O -outw(0x2813, 0x03d4); // Device I/O -outw(0x1f14, 0x03d4); // Device I/O -outw(0x9615, 0x03d4); // Device I/O -outw(0xb916, 0x03d4); // Device I/O -outw(0xa317, 0x03d4); // Device I/O -outw(0xff18, 0x03d4); // Device I/O -inb(0x03da); // Device I/O --> 31 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 21 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 01 -inb(0x03ba); // Device I/O --> ff -outw(0x0000, 0x03ce); // Device I/O -outw(0x0001, 0x03ce); // Device I/O -outw(0x0002, 0x03ce); // Device I/O -outw(0x0003, 0x03ce); // Device I/O -outw(0x0004, 0x03ce); // Device I/O -outw(0x1005, 0x03ce); // Device I/O -outw(0x0e06, 0x03ce); // Device I/O -outw(0x0007, 0x03ce); // Device I/O -outw(0xff08, 0x03ce); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00010000, 0x1044); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00010000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00010000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000001 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000001 -outl(0x00000001, 0x1044); // Device I/O -outl(0x000e4200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000001c -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00050000 -outl(0x8004003e, 0x1044); // Device I/O -outl(0x000e4214, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80060002, 0x1044); // Device I/O -outl(0x000e4218, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x01000000, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x8074003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x8074003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x8074003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4f00, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0100038e -outl(0x0100030c, 0x1044); // Device I/O -outl(0x000e4f04, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00b8338e -outl(0x00b8230c, 0x1044); // Device I/O -outl(0x000e4f08, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0178838e -outl(0x06f8930c, 0x1044); // Device I/O -outl(0x000e4f0c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8e38e -outl(0x09f8e38e, 0x1044); // Device I/O -outl(0x000e4f10, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00b8038e -outl(0x00b8030c, 0x1044); // Device I/O -outl(0x000e4f14, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0978838e -outl(0x0b78830c, 0x1044); // Device I/O -outl(0x000e4f18, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8b38e -outl(0x0ff8d3cf, 0x1044); // Device I/O -outl(0x000e4f1c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0178038e -outl(0x01e8030c, 0x1044); // Device I/O -outl(0x000e4f20, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8638e -outl(0x0ff863cf, 0x1044); // Device I/O -outl(0x000e4f24, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8038e -outl(0x0ff803cf, 0x1044); // Device I/O -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000c4000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000e1150, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000001c -outl(0x000e1150, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000001c -outl(0x0000089c, 0x1044); // Device I/O -outl(0x000fcc00, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000fcc0c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000fcc18, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000fcc24, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000c4000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 40000002 -inb(0x03d4); // Device I/O --> 18 -inb(0x03d6); // Device I/O --> ff -inb(0x03d0); // Device I/O --> ff -inb(0x03ce); // Device I/O --> 08 -inb(0x03d2); // Device I/O --> ff -inb(0x03c4); // Device I/O --> 00 -inb(0x03c7); // Device I/O --> 00 -inb(0x03c8); // Device I/O --> 00 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outw(0x2001, 0x03c4); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000800 -outl(0x000c5100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000003, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5120, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x460000a0, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5120, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 060000a0 -outl(0x4a8000a1, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a08 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a08 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffff00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a0c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a0c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00ffffff -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a10 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a10 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 4011ae30 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a14 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a14 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a18 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a18 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03011300 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a1c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a1c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 78101a80 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a20 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a20 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 9795baea -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a24 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a24 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 278c5559 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a28 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a28 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00545021 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a2c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a2c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a30 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a30 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a34 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a34 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a38 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a38 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a3c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a3c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 1b120101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a40 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a40 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 20508000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a44 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a44 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 20183014 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a48 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a48 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> a3050044 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a4c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a4c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 1f000010 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a50 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a50 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 80001693 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a54 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a54 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30142050 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a58 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a58 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00442018 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a5c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a5c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0010a305 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a60 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a60 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001f00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a64 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a64 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 81000f00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a68 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a68 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0a813c0a -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a6c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a6c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00091632 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a70 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a70 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01f0e430 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a74 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a74 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> fe000000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a78 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a78 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 31504c00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a7c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a7c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 58573132 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 4c542d33 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ac003143 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 028000a1 -outl(0x480000a0, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x000c5100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000003 -outl(0x48000000, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x00008000, 0x1044); // Device I/O -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outw(0x0001, 0x03c4); // Device I/O -outb(0x18, 0x03d4); // Device I/O <-- -outb(0xff, 0x03d6); // Device I/O <-- -outb(0xff, 0x03d0); // Device I/O <-- -outb(0x08, 0x03ce); // Device I/O <-- -outb(0xff, 0x03d2); // Device I/O <-- -outb(0x00, 0x03c4); // Device I/O <-- -outb(0x00, 0x03c8); // Device I/O <-- -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 40000002 -outl(0x00000300, 0x1044); // Device I/O -outl(0x000c7208, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00fa09c4, 0x1044); // Device I/O -outl(0x000c720c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00fa09c4, 0x1044); // Device I/O -outl(0x000c7210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00186904 -outl(0x00186903, 0x1044); // Device I/O -outl(0x00048250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80000000, 0x1044); // Device I/O -outl(0x00048254, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x061a061a, 0x1044); // Device I/O -outl(0x000c8254, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x061a061a, 0x1044); // Device I/O -outl(0x000c8250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c8250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80000000, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c4000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000001 -outl(0x0000020d, 0x1044); // Device I/O -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0000020d, 0x1044); // Device I/O -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0xc0000000, 0x1044); // Device I/O -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000400, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0xff, 0x03c6); // Device I/O <-- -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03300000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03300000 -outl(0x30300000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f048, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x30030000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30030000 -outl(0x03030000, 0x1044); // Device I/O - -vga_textmode_init(); - -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000001 -outl(0x01000008, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000700c0, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x0001 -outw(0x2001, 0x03c4); // Device I/O -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8000298e -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8000298e -outl(0x8000298e, 0x1044); // Device I/O -outl(0x00070180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00071180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068070, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068074, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000400, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8000298e -outl(0x8020298e, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0010, 0x03ce); // Device I/O -outw(0x0011, 0x03ce); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0100, 0x03c4); // Device I/O -outw(0x2001, 0x03c4); // Device I/O -outw(0x0302, 0x03c4); // Device I/O -outw(0x0003, 0x03c4); // Device I/O -outw(0x0204, 0x03c4); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0300, 0x03c4); // Device I/O -outb(0x67, 0x03c2); // Device I/O <-- -outb(0x11, 0x03d4); // Device I/O <-- -inw(0x03d4); // Device I/O --> 0x8e11 -outw(0x0e11, 0x03d4); // Device I/O -outw(0x5f00, 0x03d4); // Device I/O -outw(0x4f01, 0x03d4); // Device I/O -outw(0x5002, 0x03d4); // Device I/O -outw(0x8203, 0x03d4); // Device I/O -outw(0x5504, 0x03d4); // Device I/O -outw(0x8105, 0x03d4); // Device I/O -outw(0xbf06, 0x03d4); // Device I/O -outw(0x1f07, 0x03d4); // Device I/O -outw(0x0008, 0x03d4); // Device I/O -outw(0x4f09, 0x03d4); // Device I/O -outw(0x0d0a, 0x03d4); // Device I/O -outw(0x0e0b, 0x03d4); // Device I/O -outw(0x000c, 0x03d4); // Device I/O -outw(0x000d, 0x03d4); // Device I/O -outw(0x000e, 0x03d4); // Device I/O -outw(0x000f, 0x03d4); // Device I/O -outw(0x9c10, 0x03d4); // Device I/O -outw(0x8e11, 0x03d4); // Device I/O -outw(0x8f12, 0x03d4); // Device I/O -outw(0x2813, 0x03d4); // Device I/O -outw(0x1f14, 0x03d4); // Device I/O -outw(0x9615, 0x03d4); // Device I/O -outw(0xb916, 0x03d4); // Device I/O -outw(0xa317, 0x03d4); // Device I/O -outw(0xff18, 0x03d4); // Device I/O -inb(0x03da); // Device I/O --> 01 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 21 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 01 -inb(0x03ba); // Device I/O --> ff -outw(0x0000, 0x03ce); // Device I/O -outw(0x0001, 0x03ce); // Device I/O -outw(0x0002, 0x03ce); // Device I/O -outw(0x0003, 0x03ce); // Device I/O -outw(0x0004, 0x03ce); // Device I/O -outw(0x1005, 0x03ce); // Device I/O -outw(0x0e06, 0x03ce); // Device I/O -outw(0x0007, 0x03ce); // Device I/O -outw(0xff08, 0x03ce); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0xff, 0x03c6); // Device I/O <-- -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -vga_textmode_init(); -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x06, 0x03ce); // Device I/O <-- -inw(0x03ce); // Device I/O --> 0x0e06 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8020298e -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000302 -outl(0x00008302, 0x1044); // Device I/O -outl(0x00048250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 80000000 -outl(0x80000000, 0x1044); // Device I/O -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x000c6200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000c6200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x00001002, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0xabcd0000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f00c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c6040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00030d07 -outl(0x00021005, 0x1044); // Device I/O -outl(0x000c6014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 04800080 -outl(0x88046004, 0x1044); // Device I/O -outl(0x000c6014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 88046004 -outl(0x88046004, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x00008302, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x00060004, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x00060008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x05370517, 0x1044); // Device I/O -outl(0x0006000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x00060010, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x00060014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x03270323, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0006001c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x02cf018f, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x06, 0x03ce); // Device I/O <-- -inw(0x03ce); // Device I/O --> 0x0e06 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0006001c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 02cf018f -outl(0x027f018f, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80800000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068070, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068074, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x05000320, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x7e127ae1, 0x1044); // Device I/O -outl(0x00060034, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00800000, 0x1044); // Device I/O -outl(0x00060040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00020da7, 0x1044); // Device I/O -outl(0x00060044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00080000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000040 -outl(0x00002040, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00002040 -outl(0x00002050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00044000 -outl(0x00044000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000040, 0x1044); // Device I/O -outl(0x000f0008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000040, 0x1044); // Device I/O -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00002050 -outl(0x00022050, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000040 -outl(0x00000050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000050 -outl(0x80000050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8020298e -outl(0x0020298e, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000080, 0x1044); // Device I/O -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0018, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 000007ff -outl(0x000000ff, 0x1044); // Device I/O -outl(0x000f1018, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 000007ff -outl(0x000000ff, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00022050 -outl(0x001a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00044000 -outl(0x001c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 001c4000 -outl(0x801c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 001a2050 -outl(0x801a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801c4000 -outl(0x801c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801a2050 -outl(0x801a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000100 -outl(0x000f0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000100 -outl(0x00000100, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801c4000 -outl(0x901c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801a2050 -outl(0x901a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000600 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e0000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x000e0004, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x000e0008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x05370517, 0x1044); // Device I/O -outl(0x000e000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x000e0010, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x000e0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x03270323, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 901c4000 -outl(0xb01c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 901a2050 -outl(0xb01a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000040 -outl(0x80000040, 0x1044); // Device I/O -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x80008302, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0xabcd0000, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0000 -outl(0xabcd0002, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0002 -outl(0xabcd0003, 0x1044); // Device I/O -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000008 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000008 -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0003 -outl(0x00000003, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000400, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000c4008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c4008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c4008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 2f13a6b..4b19377 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -28,6 +28,11 @@ #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <drivers/intel/gma/edid.h> +#include <drivers/intel/gma/i915.h> +#include <pc80/vga.h> +#include <pc80/vga_io.h> + #include "chip.h" #include "nehalem.h" @@ -545,16 +550,6 @@ static void gma_pm_init_pre_vbios(struct device *dev) gtt_write(0x6c024, reg32); } -#include <pc80/vga.h> -#include <pc80/vga_io.h> - -#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT -static void fake_vbios(void) -{ -#include "fake_vbios.c" -} -#endif - static void gma_pm_init_post_vbios(struct device *dev) { struct northbridge_intel_nehalem_config *conf = dev->chip_info; @@ -620,6 +615,438 @@ static void gma_pm_init_post_vbios(struct device *dev) } } +#if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) + +static void train_link(u32 mmio) +{ + /* Clear interrupts. */ + write32(mmio + DEIIR, 0xffffffff); + + write32(mmio + 0x000f0018, 0x000000ff); + write32(mmio + 0x000f1018, 0x000000ff); + write32(mmio + 0x000f000c, 0x001a2050); + write32(mmio + 0x00060100, 0x001c4000); + write32(mmio + 0x00060100, 0x801c4000); + write32(mmio + 0x000f000c, 0x801a2050); + write32(mmio + 0x00060100, 0x801c4000); + write32(mmio + 0x000f000c, 0x801a2050); + mdelay(1); + + read32(mmio + 0x000f0014); // = 0x00000100 + write32(mmio + 0x000f0014, 0x00000100); + write32(mmio + 0x00060100, 0x901c4000); + write32(mmio + 0x000f000c, 0x901a2050); + mdelay(1); + read32(mmio + 0x000f0014); // = 0x00000600 +} + +static void power_port(u32 mmio) +{ + read32(mmio + 0x000e1100); // = 0x00000000 + write32(mmio + 0x000e1100, 0x00000000); + write32(mmio + 0x000e1100, 0x00010000); + read32(mmio + 0x000e1100); // = 0x00010000 + read32(mmio + 0x000e1100); // = 0x00010000 + read32(mmio + 0x000e1100); // = 0x00000000 + write32(mmio + 0x000e1100, 0x00000000); + read32(mmio + 0x000e1100); // = 0x00000000 + read32(mmio + 0x000e4200); // = 0x0000001c + write32(mmio + 0x000e4210, 0x8004003e); + write32(mmio + 0x000e4214, 0x80060002); + write32(mmio + 0x000e4218, 0x01000000); + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + read32(mmio + 0x000e4210); // = 0x0144003e + write32(mmio + 0x000e4210, 0x8074003e); + read32(mmio + 0x000e4210); // = 0x5144003e + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + read32(mmio + 0x000e4210); // = 0x0144003e + write32(mmio + 0x000e4210, 0x8074003e); + read32(mmio + 0x000e4210); // = 0x5144003e + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + read32(mmio + 0x000e4210); // = 0x0144003e + write32(mmio + 0x000e4210, 0x8074003e); + read32(mmio + 0x000e4210); // = 0x5144003e + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + write32(mmio + 0x000e4f00, 0x0100030c); + write32(mmio + 0x000e4f04, 0x00b8230c); + write32(mmio + 0x000e4f08, 0x06f8930c); + write32(mmio + 0x000e4f0c, 0x09f8e38e); + write32(mmio + 0x000e4f10, 0x00b8030c); + write32(mmio + 0x000e4f14, 0x0b78830c); + write32(mmio + 0x000e4f18, 0x0ff8d3cf); + write32(mmio + 0x000e4f1c, 0x01e8030c); + write32(mmio + 0x000e4f20, 0x0ff863cf); + write32(mmio + 0x000e4f24, 0x0ff803cf); + write32(mmio + 0x000c4030, 0x00001000); + read32(mmio + 0x000c4000); // = 0x00000000 + write32(mmio + 0x000c4030, 0x00001000); + read32(mmio + 0x000e1150); // = 0x0000001c + write32(mmio + 0x000e1150, 0x0000089c); + write32(mmio + 0x000fcc00, 0x01986f00); + write32(mmio + 0x000fcc0c, 0x01986f00); + write32(mmio + 0x000fcc18, 0x01986f00); + write32(mmio + 0x000fcc24, 0x01986f00); + read32(mmio + 0x000c4000); // = 0x00000000 + read32(mmio + 0x000e1180); // = 0x40000002 +} + +static void intel_gma_init(const struct northbridge_intel_nehalem_config *info, + u32 mmio, u32 physbase, u16 piobase, u32 lfb) +{ + int i; + u8 edid_data[128]; + struct edid edid; + u32 hactive, vactive, right_border, bottom_border; + int hpolarity, vpolarity; + u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch; + u32 candp1, candn; + u32 best_delta = 0xffffffff; + u32 target_frequency; + u32 pixel_p1 = 1; + u32 pixel_n = 1; + u32 pixel_m1 = 1; + u32 pixel_m2 = 1; + u32 link_frequency = info->gpu_link_frequency_270_mhz ? 270000 : 162000; + u32 data_m1; + u32 data_n1 = 0x00800000; + u32 link_m1; + u32 link_n1 = 0x00080000; + + write32(mmio + 0x00070080, 0x00000000); + write32(mmio + DSPCNTR(0), 0x00000000); + write32(mmio + 0x00071180, 0x00000000); + write32(mmio + CPU_VGACNTRL, 0x0000298e | VGA_DISP_DISABLE); + write32(mmio + 0x0007019c, 0x00000000); + write32(mmio + 0x0007119c, 0x00000000); + write32(mmio + 0x000fc008, 0x2c010000); + write32(mmio + 0x000fc020, 0x2c010000); + write32(mmio + 0x000fc038, 0x2c010000); + write32(mmio + 0x000fc050, 0x2c010000); + write32(mmio + 0x000fc408, 0x2c010000); + write32(mmio + 0x000fc420, 0x2c010000); + write32(mmio + 0x000fc438, 0x2c010000); + write32(mmio + 0x000fc450, 0x2c010000); + vga_gr_write(0x18, 0); + write32(mmio + 0x00042004, 0x02000000); + write32(mmio + 0x000fd034, 0x8421ffe0); + + /* Setup GTT. */ + for (i = 0; i < 0x2000; i++) + { + outl((i << 2) | 1, piobase); + outl(physbase + (i << 12) + 1, piobase + 4); + } + + vga_misc_write(0x67); + + const u8 cr[] = { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, + 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, + 0xff + }; + vga_cr_write(0x11, 0); + + for (i = 0; i <= 0x18; i++) + vga_cr_write(i, cr[i]); + + power_port(mmio); + + intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data); + decode_edid(edid_data, + sizeof(edid_data), &edid); + + /* Disable screen memory to prevent garbage from appearing. */ + vga_sr_write(1, vga_sr_read(1) | 0x20); + + hactive = edid.x_resolution; + vactive = edid.y_resolution; + right_border = edid.hborder; + bottom_border = edid.vborder; + hpolarity = (edid.phsync == '-'); + vpolarity = (edid.pvsync == '-'); + vsync = edid.vspw; + hsync = edid.hspw; + vblank = edid.vbl; + hblank = edid.hbl; + hfront_porch = edid.hso; + vfront_porch = edid.vso; + + target_frequency = info->gpu_lvds_dual_channel ? edid.pixel_clock + : (2 * edid.pixel_clock); +#if !IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + vga_textmode_init(); +#else + vga_sr_write(1, 1); + vga_sr_write(0x2, 0xf); + vga_sr_write(0x3, 0x0); + vga_sr_write(0x4, 0xe); + vga_gr_write(0, 0x0); + vga_gr_write(1, 0x0); + vga_gr_write(2, 0x0); + vga_gr_write(3, 0x0); + vga_gr_write(4, 0x0); + vga_gr_write(5, 0x0); + vga_gr_write(6, 0x5); + vga_gr_write(7, 0xf); + vga_gr_write(0x10, 0x1); + vga_gr_write(0x11, 0); + + + edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63; + + write32(mmio + DSPCNTR(0), DISPPLANE_BGRX888); + write32(mmio + DSPADDR(0), 0); + write32(mmio + DSPSTRIDE(0), edid.bytes_per_line); + write32(mmio + DSPSURF(0), 0); + for (i = 0; i < 0x100; i++) + write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101); +#endif + + /* Find suitable divisors. */ + for (candp1 = 1; candp1 <= 8; candp1++) { + for (candn = 5; candn <= 10; candn++) { + u32 cur_frequency; + u32 m; /* 77 - 131. */ + u32 denom; /* 35 - 560. */ + u32 current_delta; + + denom = candn * candp1 * 7; + /* Doesnt overflow for up to + 5000000 kHz = 5 GHz. */ + m = (target_frequency * denom + 60000) / 120000; + + if (m < 77 || m > 131) + continue; + + cur_frequency = (120000 * m) / denom; + if (target_frequency > cur_frequency) + current_delta = target_frequency - cur_frequency; + else + current_delta = cur_frequency - target_frequency; + + + if (best_delta > current_delta) { + best_delta = current_delta; + pixel_n = candn; + pixel_p1 = candp1; + pixel_m2 = ((m + 3) % 5) + 7; + pixel_m1 = (m - pixel_m2) / 5; + } + } + } + + if (best_delta == 0xffffffff) { + printk (BIOS_ERR, "Couldn't find GFX clock divisors\n"); + return; + } + + link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency; + data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock) + / (link_frequency * 8 * (info->gpu_lvds_num_lanes ? : 4)); + + printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", + hactive, vactive); + printk(BIOS_DEBUG, "Borders %d x %d\n", + right_border, bottom_border); + printk(BIOS_DEBUG, "Blank %d x %d\n", + hblank, vblank); + printk(BIOS_DEBUG, "Sync %d x %d\n", + hsync, vsync); + printk(BIOS_DEBUG, "Front porch %d x %d\n", + hfront_porch, vfront_porch); + printk(BIOS_DEBUG, (info->gpu_use_spread_spectrum_clock + ? "Spread spectrum clock\n" : "DREF clock\n")); + printk(BIOS_DEBUG, + info->gpu_lvds_dual_channel ? "Dual channel\n" : "Single channel\n"); + printk(BIOS_DEBUG, "Polarities %d, %d\n", + hpolarity, vpolarity); + printk(BIOS_DEBUG, "Data M1=%d, N1=%d\n", + data_m1, data_n1); + printk(BIOS_DEBUG, "Link frequency %d kHz\n", + link_frequency); + printk(BIOS_DEBUG, "Link M1=%d, N1=%d\n", + link_m1, link_n1); + printk(BIOS_DEBUG, "Pixel N=%d, M1=%d, M2=%d, P1=%d\n", + pixel_n, pixel_m1, pixel_m2, pixel_p1); + printk(BIOS_DEBUG, "Pixel clock %d kHz\n", + 120000 * (5 * pixel_m1 + pixel_m2) / pixel_n + / (pixel_p1 * 7)); + + write32(mmio + PCH_LVDS, + (hpolarity << 20) | (vpolarity << 21) + | (info->gpu_lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_DETECTED); + write32(mmio + BLC_PWM_CPU_CTL2, (1 << 31)); + write32(mmio + PCH_DREF_CONTROL, (info->gpu_use_spread_spectrum_clock + ? 0x1002 : 0x400)); + mdelay(1); + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS + | (read32(mmio + PCH_PP_CONTROL) & ~PANEL_UNLOCK_MASK)); + write32(mmio + _PCH_FP0(0), + ((pixel_n - 2) << 16) + | ((pixel_m1 - 2) << 8) | pixel_m2); + write32(mmio + _PCH_DPLL(0), + DPLL_VCO_ENABLE | DPLLB_MODE_LVDS + | (info->gpu_lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + : DPLLB_LVDS_P2_CLOCK_DIV_14) + | (0x10000 << (pixel_p1 - 1)) + | ((info->gpu_use_spread_spectrum_clock ? 3 : 0) << 13) + | (0x1 << (pixel_p1 - 1))); + mdelay(1); + write32(mmio + _PCH_DPLL(0), + DPLL_VCO_ENABLE | DPLLB_MODE_LVDS + | (info->gpu_lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + : DPLLB_LVDS_P2_CLOCK_DIV_14) + | (0x10000 << (pixel_p1 - 1)) + | ((info->gpu_use_spread_spectrum_clock ? 3 : 0) << 13) + | (0x1 << (pixel_p1 - 1))); + /* Re-lock the registers. */ + write32(mmio + PCH_PP_CONTROL, + (read32(mmio + PCH_PP_CONTROL) & ~PANEL_UNLOCK_MASK)); + + write32(mmio + PCH_LVDS, + (hpolarity << 20) | (vpolarity << 21) + | (info->gpu_lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_DETECTED); + + write32(mmio + HTOTAL(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive - 1)); + write32(mmio + HBLANK(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive + right_border - 1)); + write32(mmio + HSYNC(0), + ((hactive + right_border + hfront_porch + hsync - 1) << 16) + | (hactive + right_border + hfront_porch - 1)); + + write32(mmio + VTOTAL(0), ((vactive + bottom_border + vblank - 1) << 16) + | (vactive - 1)); + write32(mmio + VBLANK(0), ((vactive + bottom_border + vblank - 1) << 16) + | (vactive + bottom_border - 1)); + write32(mmio + VSYNC(0), + (vactive + bottom_border + vfront_porch + vsync - 1) + | (vactive + bottom_border + vfront_porch - 1)); + + write32(mmio + PIPECONF(0), PIPECONF_DISABLE); + + write32(mmio + PF_WIN_POS(0), 0); +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + write32(mmio + PIPESRC(0), ((hactive - 1) << 16) | (vactive - 1)); + write32(mmio + PF_CTL(0),0); + write32(mmio + PF_WIN_SZ(0), 0); +#else + write32(mmio + PIPESRC(0), (639 << 16) | 399); + write32(mmio + PF_CTL(0),PF_ENABLE | PF_FILTER_MED_3x3); + write32(mmio + PF_WIN_SZ(0), vactive | (hactive << 16)); +#endif + + mdelay(1); + + write32(mmio + PIPE_DATA_M1(0), 0x7e000000 | data_m1); + write32(mmio + PIPE_DATA_N1(0), data_n1); + write32(mmio + PIPE_LINK_M1(0), link_m1); + write32(mmio + PIPE_LINK_N1(0), link_n1); + + write32(mmio + 0x000f000c, 0x00002040); + mdelay(1); + write32(mmio + 0x000f000c, 0x00002050); + write32(mmio + 0x00060100, 0x00044000); + mdelay(1); + write32(mmio + PIPECONF(0), PIPECONF_BPP_6); + write32(mmio + 0x000f0008, 0x00000040); + write32(mmio + 0x000f000c, 0x00022050); + write32(mmio + PIPECONF(0), PIPECONF_BPP_6 | PIPECONF_DITHER_EN); + write32(mmio + PIPECONF(0), PIPECONF_ENABLE | PIPECONF_BPP_6 | PIPECONF_DITHER_EN); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + write32(mmio + CPU_VGACNTRL, 0x20298e | VGA_DISP_DISABLE); +#else + write32(mmio + CPU_VGACNTRL, 0x20298e); +#endif + train_link(mmio); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); + mdelay(1); +#endif + + write32(mmio + TRANS_HTOTAL(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive - 1)); + write32(mmio + TRANS_HBLANK(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive + right_border - 1)); + write32(mmio + TRANS_HSYNC(0), + ((hactive + right_border + hfront_porch + hsync - 1) << 16) + | (hactive + right_border + hfront_porch - 1)); + + write32(mmio + TRANS_VTOTAL(0), + ((vactive + bottom_border + vblank - 1) << 16) + | (vactive - 1)); + write32(mmio + TRANS_VBLANK(0), + ((vactive + bottom_border + vblank - 1) << 16) + | (vactive + bottom_border - 1)); + write32(mmio + TRANS_VSYNC(0), + (vactive + bottom_border + vfront_porch + vsync - 1) + | (vactive + bottom_border + vfront_porch - 1)); + + write32(mmio + 0x00060100, 0xb01c4000); + write32(mmio + 0x000f000c, 0xb01a2050); + mdelay(1); + write32(mmio + TRANSCONF(0), TRANS_ENABLE | TRANS_6BPC +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + | TRANS_STATE_MASK +#endif + ); + write32(mmio + PCH_LVDS, + LVDS_PORT_ENABLE + | (hpolarity << 20) | (vpolarity << 21) + | (info->gpu_lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_DETECTED); + + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_OFF); + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_RESET); + mdelay(1); + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS + | PANEL_POWER_ON | PANEL_POWER_RESET); + + printk (BIOS_DEBUG, "waiting for panel powerup\n"); + while (1) { + u32 reg32; + reg32 = read32(mmio + PCH_PP_STATUS); + if (((reg32 >> 28) & 3) == 0) + break; + } + printk (BIOS_DEBUG, "panel powered up\n"); + + write32(mmio + PCH_PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET); + + /* Enable screen memory. */ + vga_sr_write(1, vga_sr_read(1) & ~0x20); + + /* Clear interrupts. */ + write32(mmio + DEIIR, 0xffffffff); + write32(mmio + SDEIIR, 0xffffffff); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + memset ((void *) lfb, 0, edid.x_resolution * edid.y_resolution * 4); + set_vbe_mode_info_valid(&edid, lfb); +#endif +} + +#endif + + static void gma_func0_init(struct device *dev) { u32 reg32; @@ -636,8 +1063,23 @@ static void gma_func0_init(struct device *dev) /* PCI Init, will run VBIOS */ pci_dev_init(dev); #else - printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); - fake_vbios(); + u32 physbase; + struct northbridge_intel_nehalem_config *conf = dev->chip_info; + struct resource *lfb_res; + struct resource *pio_res; + + lfb_res = find_resource(dev, PCI_BASE_ADDRESS_2); + pio_res = find_resource(dev, PCI_BASE_ADDRESS_4); + + physbase = pci_read_config32(dev, 0x5c) & ~0xf; + + if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base + && lfb_res && lfb_res->base) { + printk(BIOS_SPEW, "Initializing VGA without OPROM. MMIO 0x%llx\n", + gtt_res->base); + intel_gma_init(conf, gtt_res->base, physbase, pio_res->base, + lfb_res->base); + } #endif /* Linux relies on VBT for panel info. */

1 0

Patch merged into coreboot/master: 033958f lib/selfboot: s_srcaddr is uninitialized.
by gerrit＠coreboot.org 03 Mar '14

03 Mar '14

the following patch was just integrated into master: commit 033958f02d1bb600163b333168d360ba047399fc Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Mar 1 09:27:37 2014 +1100 lib/selfboot: s_srcaddr is uninitialized. s_srcaddr is uninitialized in the BSS section, leading to a garbage valued operand on the LHS of a '<' on line 383. Change-Id: Ie4fec91b09c70fb1d91ad3918ac3f60653fa1d83 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/5314 for details. -gerrit

1 0

Patch set updated for coreboot: aa4c15e i915_reg: Declare LVDS register values.
by Vladimir Serbinenko 03 Mar '14

03 Mar '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5319 -gerrit commit aa4c15e61ced6aa308cac66018ed5105eaef8f75 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Mar 2 17:45:09 2014 +0100 i915_reg: Declare LVDS register values. Change-Id: If8b3578c4fa31bf9f09c0053a5cac7ebc993b634 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/drivers/intel/gma/i915_reg.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index f121626..ae230da 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -959,6 +959,12 @@ #define DVOC_ON (1<<31) #define LVDS 0x61180 #define LVDS_ON (1<<31) +#define LVDS_CLOCK_A_POWERUP_ALL (3 << 8) +#define LVDS_CLOCK_B_POWERUP_ALL (3 << 4) +#define LVDS_CLOCK_BOTH_POWERUP_ALL (3 << 2) +#define LVDS_BORDER_ENABLE (1 << 15) +#define LVDS_PORT_ENABLE (1 << 31) +#define LVDS_DETECTED (1 << 1) /* Scratch pad debug 0 reg: */

1 0

Patch set updated for coreboot: e21b7d8 gma: Add EDID retrieving functions.
by Vladimir Serbinenko 03 Mar '14

03 Mar '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5278 -gerrit commit e21b7d829246ca205cff95d8c49c2e4913f94c40 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Feb 21 07:21:00 2014 +0100 gma: Add EDID retrieving functions. Change-Id: I64f2fcc5ad52d6a0188d02b28769001ada718c4f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/drivers/intel/Makefile.inc | 2 +- src/drivers/intel/gma/Kconfig | 4 ++ src/drivers/intel/gma/Makefile.inc | 2 +- src/drivers/intel/gma/edid.c | 78 ++++++++++++++++++++++++++++++++++++++ src/drivers/intel/gma/edid.h | 2 + 5 files changed, 86 insertions(+), 2 deletions(-) diff --git a/src/drivers/intel/Makefile.inc b/src/drivers/intel/Makefile.inc index 82d5449..eb8617c 100644 --- a/src/drivers/intel/Makefile.inc +++ b/src/drivers/intel/Makefile.inc @@ -1 +1 @@ -subdirs-$(CONFIG_INTEL_DP) += gma +subdirs-y += gma diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig index 073f708..e26c297 100644 --- a/src/drivers/intel/gma/Kconfig +++ b/src/drivers/intel/gma/Kconfig @@ -28,3 +28,7 @@ config INTEL_DDI default n help helper functions for intel DDI operations + +config INTEL_EDID + bool + default n diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc index 0c3f45a..bea597e 100644 --- a/src/drivers/intel/gma/Makefile.inc +++ b/src/drivers/intel/gma/Makefile.inc @@ -19,4 +19,4 @@ ramstage-$(CONFIG_INTEL_DP) += intel_dp.c drm_dp_helper.c ramstage-$(CONFIG_INTEL_DDI) += intel_ddi.c - +ramstage-$(CONFIG_INTEL_EDID) += edid.c diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c new file mode 100644 index 0000000..cfabb75 --- /dev/null +++ b/src/drivers/intel/gma/edid.c @@ -0,0 +1,78 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Vladimir Serbinenko <phcoder(a)gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2, or (at your option) + * any later verion of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/console.h> +#include <delay.h> + +#include "i915_reg.h" +#include "edid.h" + +static void +wait_rdy(u32 mmio) +{ + unsigned try = 100; + + while (try--) { + if (read32(mmio + 8) & (1 << 11)) + return; + udelay(10); + } +} + +void +intel_gmbus_read_edid(u32 mmio, u8 bus, u8 slave, u8 *edid) +{ + int i; + + wait_rdy(mmio); + /* 100 KHz, hold 0ns, */ + write32(mmio + 4 * 0, bus); + wait_rdy(mmio); + /* Ensure index bits are disabled. */ + write32(mmio + 4 * 5, 0); + write32(mmio + 4 * 1, 0x46000000 | (slave << 1)); + wait_rdy(mmio); + /* Ensure index bits are disabled. */ + write32(mmio + 4 * 5, 0); + write32(mmio + 4 * 1, 0x4a800001 | (slave << 1)); + for (i = 0; i < 128 / 4; i++) { + u32 reg32; + wait_rdy(mmio); + reg32 = read32(mmio + 4 * 3); + edid[4 * i] = reg32 & 0xff; + edid[4 * i + 1] = (reg32 >> 8) & 0xff; + edid[4 * i + 2] = (reg32 >> 16) & 0xff; + edid[4 * i + 3] = (reg32 >> 24) & 0xff; + } + wait_rdy(mmio); + write32(mmio + 4 * 1, 0x4a800000 | (slave << 1)); + wait_rdy(mmio); + write32(mmio + 4 * 0, 0x48000000); + write32(mmio + 4 * 2, 0x00008000); + + printk (BIOS_INFO, "EDID:\n"); + for (i = 0; i < 128; i++) { + printk (BIOS_INFO, "%02x ", edid[i]); + if ((i & 0xf) == 0xf) + printk (BIOS_INFO, "\n"); + } +} diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h new file mode 100644 index 0000000..3d047b3 --- /dev/null +++ b/src/drivers/intel/gma/edid.h @@ -0,0 +1,2 @@ +void +intel_gmbus_read_edid(u32 gmbus_mmio, u8 bus, u8 slave, u8 *edid);

1 0

Patch set updated for coreboot: 81ebe85 NOTFORMERGE: Fix for SeaBIOS
by Vladimir Serbinenko 03 Mar '14

03 Mar '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5279 -gerrit commit 81ebe85e15a2adcb0f4215985a095dd640593e49 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Thu Feb 20 17:50:33 2014 +0100 NOTFORMERGE: Fix for SeaBIOS Change-Id: Ib2ea3742b831178ee6dba8be73e8d7fa96952327 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/southbridge/intel/bd82x6x/usb_ehci.c | 1 + src/southbridge/intel/ibexpeak/usb_ehci.c | 1 + 2 files changed, 2 insertions(+) diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c index 78f92d9..4162562 100644 --- a/src/southbridge/intel/bd82x6x/usb_ehci.c +++ b/src/southbridge/intel/bd82x6x/usb_ehci.c @@ -38,6 +38,7 @@ static void usb_ehci_init(struct device *dev) printk(BIOS_DEBUG, "EHCI: Setting up controller.. "); reg32 = pci_read_config32(dev, PCI_COMMAND); reg32 |= PCI_COMMAND_MASTER; + reg32 |= PCI_COMMAND_MEMORY; //reg32 |= PCI_COMMAND_SERR; pci_write_config32(dev, PCI_COMMAND, reg32); diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c index 7dc7b03..4d1183d 100644 --- a/src/southbridge/intel/ibexpeak/usb_ehci.c +++ b/src/southbridge/intel/ibexpeak/usb_ehci.c @@ -47,6 +47,7 @@ static void usb_ehci_init(struct device *dev) reg32 = pci_read_config32(dev, PCI_COMMAND); reg32 |= PCI_COMMAND_MASTER; + reg32 |= PCI_COMMAND_MEMORY; //reg32 |= PCI_COMMAND_SERR; pci_write_config32(dev, PCI_COMMAND, reg32);

1 0

Patch set updated for coreboot: 83a0fc2 nehalem: Replace video init.
by Vladimir Serbinenko 03 Mar '14

03 Mar '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5270 -gerrit commit 83a0fc23228334cfd8759077ce76a62ecaefc788 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Feb 19 22:18:08 2014 +0100 nehalem: Replace video init. Old video init just replayed the sequence. This one actually computes the values. Change-Id: Ic1fe7a2e90dc2cc36ac0d8bcea5cfabc583f09a3 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/drivers/intel/gma/i915_reg.h | 5 + src/mainboard/lenovo/x201/Kconfig | 1 + src/mainboard/lenovo/x201/devicetree.cb | 4 + src/northbridge/intel/nehalem/Kconfig | 1 + src/northbridge/intel/nehalem/chip.h | 5 + src/northbridge/intel/nehalem/fake_vbios.c | 1819 ---------------------------- src/northbridge/intel/nehalem/gma.c | 467 ++++++- 7 files changed, 471 insertions(+), 1831 deletions(-) diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index 8c08d9f..61b909d 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -4049,6 +4049,11 @@ #define PCH_LVDS 0xe1180 #define LVDS_DETECTED (1 << 1) +#define LVDS_BORDER_ENABLE (1 << 15) +#define LVDS_PORT_ENABLE (1 << 31) +#define LVDS_CLOCK_A_POWERUP_ALL (3 << 8) +#define LVDS_CLOCK_B_POWERUP_ALL (3 << 4) +#define LVDS_CLOCK_BOTH_POWERUP_ALL (3 << 2) /* vlv has 2 sets of panel control regs. */ #define PIPEA_PP_STATUS 0x61200 diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig index 8e7ebae..860a953 100644 --- a/src/mainboard/lenovo/x201/Kconfig +++ b/src/mainboard/lenovo/x201/Kconfig @@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 6c5229b..9053f89 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -35,6 +35,10 @@ chip northbridge/intel/nehalem register "gpu_panel_power_backlight_off_delay" = "2500" register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a" + register "gpu_use_spread_spectrum_clock" = "1" + register "gpu_lvds_dual_channel" = "0" + register "gpu_link_frequency_270_mhz" = "1" + register "gpu_lvds_num_lanes" = "4" chip ec/lenovo/pmh7 device pnp ff.1 on # dummy diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 69d0eee..4cbaf22 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -23,6 +23,7 @@ config NORTHBRIDGE_INTEL_NEHALEM select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select VGA + select INTEL_EDID if NORTHBRIDGE_INTEL_NEHALEM diff --git a/src/northbridge/intel/nehalem/chip.h b/src/northbridge/intel/nehalem/chip.h index 3164035..95f8b5f 100644 --- a/src/northbridge/intel/nehalem/chip.h +++ b/src/northbridge/intel/nehalem/chip.h @@ -38,5 +38,10 @@ struct northbridge_intel_nehalem_config { u32 gpu_cpu_backlight; /* CPU Backlight PWM value */ u32 gpu_pch_backlight; /* PCH Backlight PWM value */ + + int gpu_use_spread_spectrum_clock; + int gpu_lvds_dual_channel; + int gpu_link_frequency_270_mhz; + int gpu_lvds_num_lanes; }; diff --git a/src/northbridge/intel/nehalem/fake_vbios.c b/src/northbridge/intel/nehalem/fake_vbios.c deleted file mode 100644 index 5daf5ff..0000000 --- a/src/northbridge/intel/nehalem/fake_vbios.c +++ /dev/null @@ -1,1819 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Vladimir Serbinenko. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* This is a replay-based init for nehalem video. */ - -outb(0x23, 0x03c2); // Device I/O <-- -outb(0x02, 0x03da); // Device I/O <-- -inb(0x03c2); // Device I/O --> 10 -outb(0x01, 0x03da); // Device I/O <-- -inb(0x03c2); // Device I/O --> 10 -outl(0x00070080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00070180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00071180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00002900 -outl(0x8000298e, 0x1044); // Device I/O -outl(0x0007019c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0007119c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x00000000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffffff -outl(0x00000000, 0x1044); // Device I/O -outl(0x000fc008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc020, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc038, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc408, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc420, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc438, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outl(0x000fc450, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 2c010757 -outl(0x2c010000, 0x1044); // Device I/O -outw(0x0018, 0x03ce); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x01000001, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f048, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000001, 0x1044); // Device I/O -outl(0x0004f058, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x00042004, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x02000000, 0x1044); // Device I/O -outl(0x000fd034, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 39cfffe0 -outl(0x8421ffe0, 0x1044); // Device I/O -int i; -for (i = 0; i < 0x1fff; i++) { - outl(0x00000001 | (i << 2), 0x1040); // Device I/O - outl(0xc2000001 | (i << 12), 0x1044); // Device I/O -} - -outw(0x0302, 0x03c4); // Device I/O -outw(0x0003, 0x03c4); // Device I/O -outw(0x0204, 0x03c4); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0300, 0x03c4); // Device I/O -outb(0x67, 0x03c2); // Device I/O <-- -outb(0x11, 0x03d4); // Device I/O <-- -inw(0x03d4); // Device I/O --> 0x0011 -outw(0x0011, 0x03d4); // Device I/O -outw(0x5f00, 0x03d4); // Device I/O -outw(0x4f01, 0x03d4); // Device I/O -outw(0x5002, 0x03d4); // Device I/O -outw(0x8203, 0x03d4); // Device I/O -outw(0x5504, 0x03d4); // Device I/O -outw(0x8105, 0x03d4); // Device I/O -outw(0xbf06, 0x03d4); // Device I/O -outw(0x1f07, 0x03d4); // Device I/O -outw(0x0008, 0x03d4); // Device I/O -outw(0x4f09, 0x03d4); // Device I/O -outw(0x0d0a, 0x03d4); // Device I/O -outw(0x0e0b, 0x03d4); // Device I/O -outw(0x000c, 0x03d4); // Device I/O -outw(0x000d, 0x03d4); // Device I/O -outw(0x000e, 0x03d4); // Device I/O -outw(0x000f, 0x03d4); // Device I/O -outw(0x9c10, 0x03d4); // Device I/O -outw(0x8e11, 0x03d4); // Device I/O -outw(0x8f12, 0x03d4); // Device I/O -outw(0x2813, 0x03d4); // Device I/O -outw(0x1f14, 0x03d4); // Device I/O -outw(0x9615, 0x03d4); // Device I/O -outw(0xb916, 0x03d4); // Device I/O -outw(0xa317, 0x03d4); // Device I/O -outw(0xff18, 0x03d4); // Device I/O -inb(0x03da); // Device I/O --> 31 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 21 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 01 -inb(0x03ba); // Device I/O --> ff -outw(0x0000, 0x03ce); // Device I/O -outw(0x0001, 0x03ce); // Device I/O -outw(0x0002, 0x03ce); // Device I/O -outw(0x0003, 0x03ce); // Device I/O -outw(0x0004, 0x03ce); // Device I/O -outw(0x1005, 0x03ce); // Device I/O -outw(0x0e06, 0x03ce); // Device I/O -outw(0x0007, 0x03ce); // Device I/O -outw(0xff08, 0x03ce); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00010000, 0x1044); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00010000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00010000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000e1100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000001 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000001 -outl(0x00000001, 0x1044); // Device I/O -outl(0x000e4200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000001c -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00050000 -outl(0x8004003e, 0x1044); // Device I/O -outl(0x000e4214, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80060002, 0x1044); // Device I/O -outl(0x000e4218, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x01000000, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x8074003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x8074003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0144003e -outl(0x8074003e, 0x1044); // Device I/O -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x000e4210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 5144003e -outl(0x5344003e, 0x1044); // Device I/O -outl(0x000e4f00, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0100038e -outl(0x0100030c, 0x1044); // Device I/O -outl(0x000e4f04, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00b8338e -outl(0x00b8230c, 0x1044); // Device I/O -outl(0x000e4f08, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0178838e -outl(0x06f8930c, 0x1044); // Device I/O -outl(0x000e4f0c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8e38e -outl(0x09f8e38e, 0x1044); // Device I/O -outl(0x000e4f10, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00b8038e -outl(0x00b8030c, 0x1044); // Device I/O -outl(0x000e4f14, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0978838e -outl(0x0b78830c, 0x1044); // Device I/O -outl(0x000e4f18, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8b38e -outl(0x0ff8d3cf, 0x1044); // Device I/O -outl(0x000e4f1c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0178038e -outl(0x01e8030c, 0x1044); // Device I/O -outl(0x000e4f20, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8638e -outl(0x0ff863cf, 0x1044); // Device I/O -outl(0x000e4f24, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 09f8038e -outl(0x0ff803cf, 0x1044); // Device I/O -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000c4000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000e1150, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000001c -outl(0x000e1150, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000001c -outl(0x0000089c, 0x1044); // Device I/O -outl(0x000fcc00, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000fcc0c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000fcc18, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000fcc24, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01773f30 -outl(0x01986f00, 0x1044); // Device I/O -outl(0x000c4000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 40000002 -inb(0x03d4); // Device I/O --> 18 -inb(0x03d6); // Device I/O --> ff -inb(0x03d0); // Device I/O --> ff -inb(0x03ce); // Device I/O --> 08 -inb(0x03d2); // Device I/O --> ff -inb(0x03c4); // Device I/O --> 00 -inb(0x03c7); // Device I/O --> 00 -inb(0x03c8); // Device I/O --> 00 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outw(0x2001, 0x03c4); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000800 -outl(0x000c5100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000003, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5120, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x460000a0, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5120, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 060000a0 -outl(0x4a8000a1, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a08 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a08 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffff00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a0c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a0c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00ffffff -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a10 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a10 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 4011ae30 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a14 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a14 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a18 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a18 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03011300 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a1c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a1c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 78101a80 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a20 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a20 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 9795baea -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a24 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a24 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 278c5559 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a28 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a28 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00545021 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a2c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a2c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a30 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a30 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a34 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a34 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a38 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a38 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a3c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a3c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 1b120101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a40 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a40 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 20508000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a44 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a44 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 20183014 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a48 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a48 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> a3050044 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a4c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a4c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 1f000010 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a50 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a50 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 80001693 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a54 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a54 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30142050 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a58 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a58 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00442018 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a5c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a5c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0010a305 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a60 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a60 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001f00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a64 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a64 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 81000f00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a68 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a68 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0a813c0a -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a6c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a6c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00091632 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a70 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a70 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01f0e430 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a74 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a74 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> fe000000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a78 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a78 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 31504c00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a7c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a7c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 58573132 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 4c542d33 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ac003143 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 028000a1 -outl(0x480000a0, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x000c5100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000003 -outl(0x48000000, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x00008000, 0x1044); // Device I/O -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outw(0x0001, 0x03c4); // Device I/O -outb(0x18, 0x03d4); // Device I/O <-- -outb(0xff, 0x03d6); // Device I/O <-- -outb(0xff, 0x03d0); // Device I/O <-- -outb(0x08, 0x03ce); // Device I/O <-- -outb(0xff, 0x03d2); // Device I/O <-- -outb(0x00, 0x03c4); // Device I/O <-- -outb(0x00, 0x03c8); // Device I/O <-- -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 40000002 -outl(0x00000300, 0x1044); // Device I/O -outl(0x000c7208, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00fa09c4, 0x1044); // Device I/O -outl(0x000c720c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00fa09c4, 0x1044); // Device I/O -outl(0x000c7210, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00186904 -outl(0x00186903, 0x1044); // Device I/O -outl(0x00048250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80000000, 0x1044); // Device I/O -outl(0x00048254, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x061a061a, 0x1044); // Device I/O -outl(0x000c8254, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x061a061a, 0x1044); // Device I/O -outl(0x000c8250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c8250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80000000, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c4000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000001 -outl(0x0000020d, 0x1044); // Device I/O -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0000020d, 0x1044); // Device I/O -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0xc0000000, 0x1044); // Device I/O -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0004f054, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000020d -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000400, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0xff, 0x03c6); // Device I/O <-- -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03300000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03300000 -outl(0x30300000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f048, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30300000 -outl(0x30030000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30030000 -outl(0x03030000, 0x1044); // Device I/O - -vga_textmode_init(); - -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000001 -outl(0x01000008, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x03030000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000700c0, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x0001 -outw(0x2001, 0x03c4); // Device I/O -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8000298e -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8000298e -outl(0x8000298e, 0x1044); // Device I/O -outl(0x00070180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00071180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068070, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068074, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000400, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8000298e -outl(0x8020298e, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0010, 0x03ce); // Device I/O -outw(0x0011, 0x03ce); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0100, 0x03c4); // Device I/O -outw(0x2001, 0x03c4); // Device I/O -outw(0x0302, 0x03c4); // Device I/O -outw(0x0003, 0x03c4); // Device I/O -outw(0x0204, 0x03c4); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outw(0x0300, 0x03c4); // Device I/O -outb(0x67, 0x03c2); // Device I/O <-- -outb(0x11, 0x03d4); // Device I/O <-- -inw(0x03d4); // Device I/O --> 0x8e11 -outw(0x0e11, 0x03d4); // Device I/O -outw(0x5f00, 0x03d4); // Device I/O -outw(0x4f01, 0x03d4); // Device I/O -outw(0x5002, 0x03d4); // Device I/O -outw(0x8203, 0x03d4); // Device I/O -outw(0x5504, 0x03d4); // Device I/O -outw(0x8105, 0x03d4); // Device I/O -outw(0xbf06, 0x03d4); // Device I/O -outw(0x1f07, 0x03d4); // Device I/O -outw(0x0008, 0x03d4); // Device I/O -outw(0x4f09, 0x03d4); // Device I/O -outw(0x0d0a, 0x03d4); // Device I/O -outw(0x0e0b, 0x03d4); // Device I/O -outw(0x000c, 0x03d4); // Device I/O -outw(0x000d, 0x03d4); // Device I/O -outw(0x000e, 0x03d4); // Device I/O -outw(0x000f, 0x03d4); // Device I/O -outw(0x9c10, 0x03d4); // Device I/O -outw(0x8e11, 0x03d4); // Device I/O -outw(0x8f12, 0x03d4); // Device I/O -outw(0x2813, 0x03d4); // Device I/O -outw(0x1f14, 0x03d4); // Device I/O -outw(0x9615, 0x03d4); // Device I/O -outw(0xb916, 0x03d4); // Device I/O -outw(0xa317, 0x03d4); // Device I/O -outw(0xff18, 0x03d4); // Device I/O -inb(0x03da); // Device I/O --> 01 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 21 -inb(0x03ba); // Device I/O --> ff -inb(0x03da); // Device I/O --> 01 -inb(0x03ba); // Device I/O --> ff -outw(0x0000, 0x03ce); // Device I/O -outw(0x0001, 0x03ce); // Device I/O -outw(0x0002, 0x03ce); // Device I/O -outw(0x0003, 0x03ce); // Device I/O -outw(0x0004, 0x03ce); // Device I/O -outw(0x1005, 0x03ce); // Device I/O -outw(0x0e06, 0x03ce); // Device I/O -outw(0x0007, 0x03ce); // Device I/O -outw(0xff08, 0x03ce); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0xff, 0x03c6); // Device I/O <-- -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -vga_textmode_init(); -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x06, 0x03ce); // Device I/O <-- -inw(0x03ce); // Device I/O --> 0x0e06 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8020298e -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000302 -outl(0x00008302, 0x1044); // Device I/O -outl(0x00048250, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 80000000 -outl(0x80000000, 0x1044); // Device I/O -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x000c6200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000c6200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x00001002, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0xabcd0000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f00c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c6040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00030d07 -outl(0x00021005, 0x1044); // Device I/O -outl(0x000c6014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 04800080 -outl(0x88046004, 0x1044); // Device I/O -outl(0x000c6014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 88046004 -outl(0x88046004, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x00008302, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x00060004, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x00060008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x05370517, 0x1044); // Device I/O -outl(0x0006000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x00060010, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x00060014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x03270323, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0006001c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x02cf018f, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f050, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x06, 0x03ce); // Device I/O <-- -inw(0x03ce); // Device I/O --> 0x0e06 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outb(0x01, 0x03c4); // Device I/O <-- -inw(0x03c4); // Device I/O --> 0x2001 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0006001c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 02cf018f -outl(0x027f018f, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068080, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x80800000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068070, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00068074, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x05000320, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x7e127ae1, 0x1044); // Device I/O -outl(0x00060034, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00800000, 0x1044); // Device I/O -outl(0x00060040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00020da7, 0x1044); // Device I/O -outl(0x00060044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00080000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000040 -outl(0x00002040, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00002040 -outl(0x00002050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00044000 -outl(0x00044000, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000040, 0x1044); // Device I/O -outl(0x000f0008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000040, 0x1044); // Device I/O -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00002050 -outl(0x00022050, 0x1044); // Device I/O -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000040 -outl(0x00000050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00070008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000050 -outl(0x80000050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x00041000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 8020298e -outl(0x0020298e, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000080, 0x1044); // Device I/O -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0018, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 000007ff -outl(0x000000ff, 0x1044); // Device I/O -outl(0x000f1018, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 000007ff -outl(0x000000ff, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00022050 -outl(0x001a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00044000 -outl(0x001c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 001c4000 -outl(0x801c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 001a2050 -outl(0x801a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801c4000 -outl(0x801c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801a2050 -outl(0x801a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000100 -outl(0x000f0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000100 -outl(0x00000100, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801c4000 -outl(0x901c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 801a2050 -outl(0x901a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000600 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000e0000, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x000e0004, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x057f04ff, 0x1044); // Device I/O -outl(0x000e0008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x05370517, 0x1044); // Device I/O -outl(0x000e000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x000e0010, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0333031f, 0x1044); // Device I/O -outl(0x000e0014, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x03270323, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00060100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 901c4000 -outl(0xb01c4000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f000c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 901a2050 -outl(0xb01a2050, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000f0008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000040 -outl(0x80000040, 0x1044); // Device I/O -outl(0x000e1180, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008302 -outl(0x80008302, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0xabcd0000, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0000 -outl(0xabcd0002, 0x1044); // Device I/O -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0002 -outl(0xabcd0003, 0x1044); // Device I/O -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d000000a -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> d0000009 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000008 -outl(0x000c7200, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> c0000008 -outl(0x000c7204, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> abcd0003 -outl(0x00000003, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f040, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01000008 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000400, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000400 -outl(0x00000000, 0x1044); // Device I/O -outl(0x0004f044, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x0004f04c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03030000 -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x000c4030, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001000 -outl(0x00001000, 0x1044); // Device I/O -outl(0x000c4008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c4008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c4008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00044008, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 2f13a6b..73a9f44 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -28,6 +28,11 @@ #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <drivers/intel/gma/edid.h> +#include <drivers/intel/gma/i915.h> +#include <pc80/vga.h> +#include <pc80/vga_io.h> + #include "chip.h" #include "nehalem.h" @@ -545,16 +550,6 @@ static void gma_pm_init_pre_vbios(struct device *dev) gtt_write(0x6c024, reg32); } -#include <pc80/vga.h> -#include <pc80/vga_io.h> - -#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT -static void fake_vbios(void) -{ -#include "fake_vbios.c" -} -#endif - static void gma_pm_init_post_vbios(struct device *dev) { struct northbridge_intel_nehalem_config *conf = dev->chip_info; @@ -620,6 +615,439 @@ static void gma_pm_init_post_vbios(struct device *dev) } } +#if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) + +static void train_link(u32 mmio) +{ + /* Clear interrupts. */ + write32(mmio + DEIIR, 0xffffffff); + + write32(mmio + 0x000f0018, 0x000000ff); + write32(mmio + 0x000f1018, 0x000000ff); + write32(mmio + 0x000f000c, 0x001a2050); + write32(mmio + 0x00060100, 0x001c4000); + write32(mmio + 0x00060100, 0x801c4000); + write32(mmio + 0x000f000c, 0x801a2050); + write32(mmio + 0x00060100, 0x801c4000); + write32(mmio + 0x000f000c, 0x801a2050); + mdelay(1); + + read32(mmio + 0x000f0014); // = 0x00000100 + write32(mmio + 0x000f0014, 0x00000100); + write32(mmio + 0x00060100, 0x901c4000); + write32(mmio + 0x000f000c, 0x901a2050); + mdelay(1); + read32(mmio + 0x000f0014); // = 0x00000600 +} + +static void power_port(u32 mmio) +{ + read32(mmio + 0x000e1100); // = 0x00000000 + write32(mmio + 0x000e1100, 0x00000000); + write32(mmio + 0x000e1100, 0x00010000); + read32(mmio + 0x000e1100); // = 0x00010000 + read32(mmio + 0x000e1100); // = 0x00010000 + read32(mmio + 0x000e1100); // = 0x00000000 + write32(mmio + 0x000e1100, 0x00000000); + read32(mmio + 0x000e1100); // = 0x00000000 + read32(mmio + 0x000e4200); // = 0x0000001c + write32(mmio + 0x000e4210, 0x8004003e); + write32(mmio + 0x000e4214, 0x80060002); + write32(mmio + 0x000e4218, 0x01000000); + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + read32(mmio + 0x000e4210); // = 0x0144003e + write32(mmio + 0x000e4210, 0x8074003e); + read32(mmio + 0x000e4210); // = 0x5144003e + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + read32(mmio + 0x000e4210); // = 0x0144003e + write32(mmio + 0x000e4210, 0x8074003e); + read32(mmio + 0x000e4210); // = 0x5144003e + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + read32(mmio + 0x000e4210); // = 0x0144003e + write32(mmio + 0x000e4210, 0x8074003e); + read32(mmio + 0x000e4210); // = 0x5144003e + read32(mmio + 0x000e4210); // = 0x5144003e + write32(mmio + 0x000e4210, 0x5344003e); + write32(mmio + 0x000e4f00, 0x0100030c); + write32(mmio + 0x000e4f04, 0x00b8230c); + write32(mmio + 0x000e4f08, 0x06f8930c); + write32(mmio + 0x000e4f0c, 0x09f8e38e); + write32(mmio + 0x000e4f10, 0x00b8030c); + write32(mmio + 0x000e4f14, 0x0b78830c); + write32(mmio + 0x000e4f18, 0x0ff8d3cf); + write32(mmio + 0x000e4f1c, 0x01e8030c); + write32(mmio + 0x000e4f20, 0x0ff863cf); + write32(mmio + 0x000e4f24, 0x0ff803cf); + write32(mmio + 0x000c4030, 0x00001000); + read32(mmio + 0x000c4000); // = 0x00000000 + write32(mmio + 0x000c4030, 0x00001000); + read32(mmio + 0x000e1150); // = 0x0000001c + write32(mmio + 0x000e1150, 0x0000089c); + write32(mmio + 0x000fcc00, 0x01986f00); + write32(mmio + 0x000fcc0c, 0x01986f00); + write32(mmio + 0x000fcc18, 0x01986f00); + write32(mmio + 0x000fcc24, 0x01986f00); + read32(mmio + 0x000c4000); // = 0x00000000 + read32(mmio + 0x000e1180); // = 0x40000002 +} + +static void intel_gma_init(const struct northbridge_intel_nehalem_config *info, + u32 mmio, u32 physbase, u16 piobase, u32 lfb) +{ + int i; + u8 edid_data[128]; + struct edid edid; + u32 hactive, vactive, right_border, bottom_border; + int hpolarity, vpolarity; + u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch; + u32 candp1, candn; + u32 best_delta = 0xffffffff; + u32 target_frequency; + u32 pixel_p1 = 1; + u32 pixel_n = 1; + u32 pixel_m1 = 1; + u32 pixel_m2 = 1; + u32 link_frequency = info->gpu_link_frequency_270_mhz ? 270000 : 162000; + u32 data_m1; + u32 data_n1 = 0x00800000; + u32 link_m1; + u32 link_n1 = 0x00080000; + + write32(mmio + 0x00070080, 0x00000000); + write32(mmio + DSPCNTR(0), 0x00000000); + write32(mmio + 0x00071180, 0x00000000); + write32(mmio + CPU_VGACNTRL, 0x0000298e | VGA_DISP_DISABLE); + write32(mmio + 0x0007019c, 0x00000000); + write32(mmio + 0x0007119c, 0x00000000); + write32(mmio + 0x000fc008, 0x2c010000); + write32(mmio + 0x000fc020, 0x2c010000); + write32(mmio + 0x000fc038, 0x2c010000); + write32(mmio + 0x000fc050, 0x2c010000); + write32(mmio + 0x000fc408, 0x2c010000); + write32(mmio + 0x000fc420, 0x2c010000); + write32(mmio + 0x000fc438, 0x2c010000); + write32(mmio + 0x000fc450, 0x2c010000); + vga_gr_write(0x18, 0); + write32(mmio + 0x00042004, 0x02000000); + write32(mmio + 0x000fd034, 0x8421ffe0); + + /* Setup GTT. */ + for (i = 0; i < 0x2000; i++) + { + outl((i << 2) | 1, piobase); + outl(physbase + (i << 12) + 1, piobase + 4); + } + + vga_misc_write(0x67); + + const u8 cr[] = { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, + 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, + 0xff + }; + vga_cr_write(0x11, 0); + + for (i = 0; i <= 0x18; i++) + vga_cr_write(i, cr[i]); + + power_port(mmio); + + intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data); + decode_edid(edid_data, + sizeof(edid_data), &edid); + + /* Disable screen memory to prevent garbage from appearing. */ + vga_sr_write(1, vga_sr_read(1) | 0x20); + + hactive = edid.x_resolution; + vactive = edid.y_resolution; + right_border = edid.hborder; + bottom_border = edid.vborder; + hpolarity = (edid.phsync == '-'); + vpolarity = (edid.pvsync == '-'); + vsync = edid.vspw; + hsync = edid.hspw; + vblank = edid.vbl; + hblank = edid.hbl; + hfront_porch = edid.hso; + vfront_porch = edid.vso; + + target_frequency = info->gpu_lvds_dual_channel ? edid.pixel_clock + : (2 * edid.pixel_clock); +#if !IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + vga_textmode_init(); +#else + vga_sr_write(1, 1); + vga_sr_write(0x2, 0xf); + vga_sr_write(0x3, 0x0); + vga_sr_write(0x4, 0xe); + vga_gr_write(0, 0x0); + vga_gr_write(1, 0x0); + vga_gr_write(2, 0x0); + vga_gr_write(3, 0x0); + vga_gr_write(4, 0x0); + vga_gr_write(5, 0x0); + vga_gr_write(6, 0x5); + vga_gr_write(7, 0xf); + vga_gr_write(0x10, 0x1); + vga_gr_write(0x11, 0); + + + edid.bytes_per_line = (edid.bytes_per_line + 63) & ~63; + + write32(mmio + DSPCNTR(0), DISPPLANE_BGRX888); + write32(mmio + DSPADDR(0), 0); + write32(mmio + DSPSTRIDE(0), edid.bytes_per_line); + write32(mmio + DSPSURF(0), 0); + for (i = 0; i < 0x100; i++) + write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101); +#endif + + /* Find suitable divisors. */ + for (candp1 = 1; candp1 <= 8; candp1++) { + for (candn = 5; candn <= 10; candn++) { + u32 cur_frequency; + u32 m; /* 77 - 131. */ + u32 denom; /* 35 - 560. */ + u32 current_delta; + + denom = candn * candp1 * 7; + /* Doesnt overflow for up to + 5000000 kHz = 5 GHz. */ + m = (target_frequency * denom + 60000) / 120000; + + if (m < 77 || m > 131) + continue; + + cur_frequency = (120000 * m) / denom; + if (target_frequency > cur_frequency) + current_delta = target_frequency - cur_frequency; + else + current_delta = cur_frequency - target_frequency; + + + if (best_delta > current_delta) { + best_delta = current_delta; + pixel_n = candn; + pixel_p1 = candp1; + pixel_m2 = ((m + 3) % 5) + 7; + pixel_m1 = (m - pixel_m2) / 5; + } + } + } + + if (best_delta == 0xffffffff) { + printk (BIOS_ERR, "Couldn't find GFX clock divisors\n"); + return; + } + + link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency; + data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock) + / (link_frequency * 8 * (info->gpu_lvds_num_lanes ? : 4)); + + printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", + hactive, vactive); + printk(BIOS_DEBUG, "Borders %d x %d\n", + right_border, bottom_border); + printk(BIOS_DEBUG, "Blank %d x %d\n", + hblank, vblank); + printk(BIOS_DEBUG, "Sync %d x %d\n", + hsync, vsync); + printk(BIOS_DEBUG, "Front porch %d x %d\n", + hfront_porch, vfront_porch); + printk(BIOS_DEBUG, (info->gpu_use_spread_spectrum_clock + ? "Spread spectrum clock\n" : "DREF clock\n")); + printk(BIOS_DEBUG, + info->gpu_lvds_dual_channel ? "Dual channel\n" : "Single channel\n"); + printk(BIOS_DEBUG, "Polarities %d, %d\n", + hpolarity, vpolarity); + printk(BIOS_DEBUG, "Data M1=%d, N1=%d\n", + data_m1, data_n1); + printk(BIOS_DEBUG, "Link frequency %d kHz\n", + link_frequency); + printk(BIOS_DEBUG, "Link M1=%d, N1=%d\n", + link_m1, link_n1); + printk(BIOS_DEBUG, "Pixel N=%d, M1=%d, M2=%d, P1=%d\n", + pixel_n, pixel_m1, pixel_m2, pixel_p1); + printk(BIOS_DEBUG, "Pixel clock %d kHz\n", + 120000 * (5 * pixel_m1 + pixel_m2) / pixel_n + / (pixel_p1 * 7)); + + write32(mmio + PCH_LVDS, + (hpolarity << 20) | (vpolarity << 21) + | (info->gpu_lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_DETECTED); + write32(mmio + BLC_PWM_CPU_CTL2, (1 << 31)); + write32(mmio + PCH_DREF_CONTROL, (info->gpu_use_spread_spectrum_clock + ? 0x1002 : 0x400)); + mdelay(1); + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS + | (read32(mmio + PCH_PP_CONTROL) & ~PANEL_UNLOCK_MASK)); + write32(mmio + _PCH_FP0(0), + ((pixel_n - 2) << 16) + | ((pixel_m1 - 2) << 8) | pixel_m2); + write32(mmio + _PCH_DPLL(0), + DPLL_VCO_ENABLE | DPLLB_MODE_LVDS + | (info->gpu_lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + : DPLLB_LVDS_P2_CLOCK_DIV_14) + | (0x10000 << (pixel_p1 - 1)) + | ((info->gpu_use_spread_spectrum_clock ? 3 : 0) << 13) + | (0x1 << (pixel_p1 - 1))); + mdelay(1); + write32(mmio + _PCH_DPLL(0), + DPLL_VCO_ENABLE | DPLLB_MODE_LVDS + | (info->gpu_lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + : DPLLB_LVDS_P2_CLOCK_DIV_14) + | (0x10000 << (pixel_p1 - 1)) + | ((info->gpu_use_spread_spectrum_clock ? 3 : 0) << 13) + | (0x1 << (pixel_p1 - 1))); + /* Re-lock the registers. */ + write32(mmio + PCH_PP_CONTROL, + (read32(mmio + PCH_PP_CONTROL) & ~PANEL_UNLOCK_MASK)); + + write32(mmio + PCH_LVDS, + (hpolarity << 20) | (vpolarity << 21) + | (info->gpu_lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_DETECTED); + + write32(mmio + HTOTAL(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive - 1)); + write32(mmio + HBLANK(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive + right_border - 1)); + write32(mmio + HSYNC(0), + ((hactive + right_border + hfront_porch + hsync - 1) << 16) + | (hactive + right_border + hfront_porch - 1)); + + write32(mmio + VTOTAL(0), ((vactive + bottom_border + vblank - 1) << 16) + | (vactive - 1)); + write32(mmio + VBLANK(0), ((vactive + bottom_border + vblank - 1) << 16) + | (vactive + bottom_border - 1)); + write32(mmio + VSYNC(0), + (vactive + bottom_border + vfront_porch + vsync - 1) + | (vactive + bottom_border + vfront_porch - 1)); + + write32(mmio + PIPECONF(0), PIPECONF_DISABLE); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + write32(mmio + PIPESRC(0), ((hactive - 1) << 16) | (vactive - 1)); + write32(mmio + PF_CTL(0),0); + write32(mmio + PF_WIN_SZ(0), 0); + write32(mmio + PF_WIN_POS(0), 0); +#else + write32(mmio + PIPESRC(0), (639 << 16) | 399); + write32(mmio + PF_CTL(0),PF_ENABLE | PF_FILTER_MED_3x3); + write32(mmio + PF_WIN_SZ(0), vactive | (hactive << 16)); + write32(mmio + PF_WIN_POS(0), 0); +#endif + + mdelay(1); + + write32(mmio + PIPE_DATA_M1(0), 0x7e000000 | data_m1); + write32(mmio + PIPE_DATA_N1(0), data_n1); + write32(mmio + PIPE_LINK_M1(0), link_m1); + write32(mmio + PIPE_LINK_N1(0), link_n1); + + write32(mmio + 0x000f000c, 0x00002040); + mdelay(1); + write32(mmio + 0x000f000c, 0x00002050); + write32(mmio + 0x00060100, 0x00044000); + mdelay(1); + write32(mmio + PIPECONF(0), PIPECONF_BPP_6); + write32(mmio + 0x000f0008, 0x00000040); + write32(mmio + 0x000f000c, 0x00022050); + write32(mmio + PIPECONF(0), PIPECONF_BPP_6 | PIPECONF_DITHER_EN); + write32(mmio + PIPECONF(0), PIPECONF_ENABLE | PIPECONF_BPP_6 | PIPECONF_DITHER_EN); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + write32(mmio + CPU_VGACNTRL, 0x20298e | VGA_DISP_DISABLE); +#else + write32(mmio + CPU_VGACNTRL, 0x20298e); +#endif + train_link(mmio); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); + mdelay(1); +#endif + + write32(mmio + TRANS_HTOTAL(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive - 1)); + write32(mmio + TRANS_HBLANK(0), + ((hactive + right_border + hblank - 1) << 16) + | (hactive + right_border - 1)); + write32(mmio + TRANS_HSYNC(0), + ((hactive + right_border + hfront_porch + hsync - 1) << 16) + | (hactive + right_border + hfront_porch - 1)); + + write32(mmio + TRANS_VTOTAL(0), + ((vactive + bottom_border + vblank - 1) << 16) + | (vactive - 1)); + write32(mmio + TRANS_VBLANK(0), + ((vactive + bottom_border + vblank - 1) << 16) + | (vactive + bottom_border - 1)); + write32(mmio + TRANS_VSYNC(0), + (vactive + bottom_border + vfront_porch + vsync - 1) + | (vactive + bottom_border + vfront_porch - 1)); + + write32(mmio + 0x00060100, 0xb01c4000); + write32(mmio + 0x000f000c, 0xb01a2050); + mdelay(1); + write32(mmio + TRANSCONF(0), TRANS_ENABLE | TRANS_6BPC +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + | TRANS_STATE_MASK +#endif + ); + write32(mmio + PCH_LVDS, + LVDS_PORT_ENABLE + | (hpolarity << 20) | (vpolarity << 21) + | (info->gpu_lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) + | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL + | LVDS_DETECTED); + + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_OFF); + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS | PANEL_POWER_RESET); + mdelay(1); + write32(mmio + PCH_PP_CONTROL, PANEL_UNLOCK_REGS + | PANEL_POWER_ON | PANEL_POWER_RESET); + + printk (BIOS_DEBUG, "waiting for panel powerup\n"); + while (1) { + u32 reg32; + reg32 = read32(mmio + PCH_PP_STATUS); + if (((reg32 >> 28) & 3) == 0) + break; + } + printk (BIOS_DEBUG, "panel powered up\n"); + + write32(mmio + PCH_PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET); + + /* Enable screen memory. */ + vga_sr_write(1, vga_sr_read(1) & ~0x20); + + /* Clear interrupts. */ + write32(mmio + DEIIR, 0xffffffff); + write32(mmio + SDEIIR, 0xffffffff); + +#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) + memset ((void *) lfb, 0, edid.x_resolution * edid.y_resolution * 4); + set_vbe_mode_info_valid(&edid, lfb); +#endif +} + +#endif + + static void gma_func0_init(struct device *dev) { u32 reg32; @@ -636,8 +1064,23 @@ static void gma_func0_init(struct device *dev) /* PCI Init, will run VBIOS */ pci_dev_init(dev); #else - printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); - fake_vbios(); + u32 physbase; + struct northbridge_intel_nehalem_config *conf = dev->chip_info; + struct resource *lfb_res; + struct resource *pio_res; + + lfb_res = find_resource(dev, PCI_BASE_ADDRESS_2); + pio_res = find_resource(dev, PCI_BASE_ADDRESS_4); + + physbase = pci_read_config32(dev, 0x5c) & ~0xf; + + if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base + && lfb_res && lfb_res->base) { + printk(BIOS_SPEW, "Initializing VGA without OPROM. MMIO 0x%llx\n", + gtt_res->base); + intel_gma_init(conf, gtt_res->base, physbase, pio_res->base, + lfb_res->base); + } #endif /* Linux relies on VBT for panel info. */

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coreboot-gerrit March 2014