Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3651
-gerrit
commit f7d96d6011402284b9f7c90069114956b33f114b
Author: Gabe Black <gabeblack(a)google.com>
Date: Sat May 18 21:41:59 2013 -0700
ARM: Fix the way the space for the page tables is allocated.
The page tables need to be aligned to a 16KB boundary and are 16KB in size.
The CBMEM allocator only guarantees 512 byte alignment, so to make sure
things are where they're supposed to be, the code was allocating extra space
and then adjusting the pointer upwards. Unfortunately, it was adding the size
of the table to the pointer first, then aligning it. Since it allocated twice
the space of the table, this had the effect of moving past the first table
size region of bytes, and then aligning upwards, pushing the end of the table
out of the space allocated for it.
You can get away with this if you push things you don't care about off the
end, and it happened to be the case that we were allocating a color map we
weren't using at the start of the next part of cbmem.
Change-Id: I6b196fc573801b02f27f2e667acbf06163266651
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/arch/armv7/lib/mmu.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/arch/armv7/lib/mmu.c b/src/arch/armv7/lib/mmu.c
index d4e08f7..594bba5 100644
--- a/src/arch/armv7/lib/mmu.c
+++ b/src/arch/armv7/lib/mmu.c
@@ -118,11 +118,12 @@ void mmu_init(void)
* programmer's guide)
*
* FIXME: TLB needs to be aligned to 16KB, but cbmem_add() aligns to
- * 512 bytes. So add double the space in cbmem and fix-up the pointer.
+ * 512 bytes. So allocate some extra space in cbmem and fix-up the
+ * pointer.
*/
- ttb_size = L1_TLB_ENTRIES * sizeof(unsigned long);
- ttb_addr = (uintptr_t)cbmem_add(CBMEM_ID_GDT, ttb_size * 2);
- ttb_addr = ALIGN(ttb_addr + ttb_size, ttb_size);
+ ttb_size = L1_TLB_ENTRIES * sizeof(uint32_t);
+ ttb_addr = (uintptr_t)cbmem_add(CBMEM_ID_GDT, ttb_size + 16*KiB);
+ ttb_addr = ALIGN(ttb_addr, 16*KiB);
printk(BIOS_DEBUG, "Translation table is @ 0x%08x\n", ttb_addr);
/*
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3650
-gerrit
commit cb578dc6a4df4d1a71a64a8c0ebe83605e4628c2
Author: Gabe Black <gabeblack(a)google.com>
Date: Sat May 18 15:55:47 2013 -0700
snow: Make coreboot set up pins for busses it knows are hooked up as such.
Coreboot knows that, for the snow board, certain pins are to be connected to
bus controllers in the SOC and to the wires of a bus external to the SOC. It
can configure them as such and free its payload from having to know how to
set everything up.
Change-Id: I1bb127c810e9ee077afc4227a6f316eaa53d6498
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/mainboard.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 250b71f..2dd56fc 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -176,6 +176,32 @@ static void disable_usb30_pll(void)
gpio_direction_output(usb3_pll_l, 0);
}
+static void gpio_init(void)
+{
+ /* Set up the I2C busses. */
+ exynos_pinmux_config(PERIPH_ID_I2C0, PINMUX_FLAG_NONE);
+ exynos_pinmux_config(PERIPH_ID_I2C1, PINMUX_FLAG_NONE);
+ exynos_pinmux_config(PERIPH_ID_I2C2, PINMUX_FLAG_NONE);
+ exynos_pinmux_config(PERIPH_ID_I2C3, PINMUX_FLAG_NONE);
+ exynos_pinmux_config(PERIPH_ID_I2C4, PINMUX_FLAG_NONE);
+ exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE);
+
+ /* Set up the GPIOs used to arbitrate for I2C bus 4. */
+ gpio_set_pull(GPIO_F03, GPIO_PULL_NONE);
+ gpio_set_pull(GPIO_E04, GPIO_PULL_NONE);
+ gpio_direction_output(GPIO_F03, 1);
+ gpio_direction_input(GPIO_E04);
+
+ /* Set up the GPIO used to enable the audio codec. */
+ gpio_set_pull(GPIO_X17, GPIO_PULL_NONE);
+ gpio_set_pull(GPIO_X15, GPIO_PULL_NONE);
+ gpio_direction_output(GPIO_X17, 1);
+ gpio_direction_output(GPIO_X15, 1);
+
+ /* Set up the I2S busses. */
+ exynos_pinmux_config(PERIPH_ID_I2S1, PINMUX_FLAG_NONE);
+}
+
/* this happens after cpu_init where exynos resources are set */
static void mainboard_init(device_t dev)
{
@@ -186,6 +212,8 @@ static void mainboard_init(device_t dev)
};
void *fb_addr;
+ gpio_init();
+
i2c_init(TPS69050_BUS, I2C_0_SPEED, I2C_SLAVE);
i2c_init(7, I2C_0_SPEED, I2C_SLAVE);
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3649
-gerrit
commit 2d49b2ac86b04847cc88e6daa54c2ce57822e1d0
Author: Gabe Black <gabeblack(a)google.com>
Date: Sat May 18 15:52:01 2013 -0700
exynos5250: When enabling the I2S pins, turn off pull ups/downs.
These pins will be driven by the internal controller which shouldn't have pull
ups or downs in the pin fighting with them.
Change-Id: I579aed84ace45d8f5f1d3ca64c064d98de842b57
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/cpu/samsung/exynos5250/pinmux.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/cpu/samsung/exynos5250/pinmux.c b/src/cpu/samsung/exynos5250/pinmux.c
index 6991dfc..9a473d0 100644
--- a/src/cpu/samsung/exynos5250/pinmux.c
+++ b/src/cpu/samsung/exynos5250/pinmux.c
@@ -286,8 +286,10 @@ int exynos_pinmux_config(enum periph_id peripheral, int flags)
gpio_set_pull(GPIO_X07, GPIO_PULL_NONE);
break;
case PERIPH_ID_I2S1:
- for (i = 0; i < 5; i++)
+ for (i = 0; i < 5; i++) {
gpio_cfg_pin(GPIO_B00 + i, GPIO_FUNC(0x02));
+ gpio_set_pull(GPIO_B00 + i, GPIO_PULL_NONE);
+ }
break;
default:
printk(BIOS_DEBUG, "%s: invalid peripheral %d", __func__, peripheral);
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3662
-gerrit
commit d03eeb023e07dedb6e8946149029b6a438169ff8
Author: Hung-Te Lin <hungte(a)chromium.org>
Date: Mon Jun 10 14:45:39 2013 -0700
Exynos: Change BL1 (boot loader 1) file name.
Change every "boot loader 1" to be same file name in different folders.
Change-Id: I4c9f342bb7395feceaa981279c6a65b4d8386945
Signed-off-by: Hung-Te Lin <hungte(a)chromium.org>
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/cpu/samsung/exynos5420/Makefile.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc
index 4099b12..c3416c4 100644
--- a/src/cpu/samsung/exynos5420/Makefile.inc
+++ b/src/cpu/samsung/exynos5420/Makefile.inc
@@ -51,5 +51,5 @@ ramstage-y += fb.c
exynos5420_add_bl1: $(obj)/coreboot.pre
printf " DD Adding Samsung Exynos5420 BL1\n"
- dd if=3rdparty/cpu/samsung/exynos5420/E5420.nbl1.bin \
+ dd if=3rdparty/cpu/samsung/exynos5420/bl1.bin \
of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3661
-gerrit
commit 3f5f4333b7ad1152dcc79f236efd7ff00c1a3948
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Fri May 17 10:34:25 2013 -0700
google/snow: Don't spew output with GPIO config
There are hundreds of GPIOs on the Exynos5250. Don't
always print all of them per default.
Change-Id: Ie349f2a4117883302b743027ed13cc9705b804f8
Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org>
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/mainboard.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 76605bb..a0d6a61 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -229,6 +229,8 @@ static void mainboard_init(device_t dev)
set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr);
lcd_vdd();
+
+ // FIXME: should timeout
do {
udelay(50);
} while (!exynos_dp_hotplug());
@@ -256,7 +258,8 @@ static void mainboard_init(device_t dev)
if (dp_tries > MAX_DP_TRIES)
printk(BIOS_ERR, "%s: Failed to set up displayport\n", __func__);
- gpio_info();
+ // Uncomment to get excessive GPIO output:
+ // gpio_info();
}
static void mainboard_enable(device_t dev)