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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by ChrisEric1 CECL (Code Review) 15 Feb '23

15 Feb '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 16: (3 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/5def3b1f_63ae27dd PS15, Line 154: msg_pdbg("VL805 firmware version 0x%08x\n", val); > On some compilers we have problems with printing fixed size integers. […] Done https://review.coreboot.org/c/flashrom/+/72057/comment/72bdfb62_7fa62970 PS15, Line 175: register_spi_master(&spi_master_vl805, dev); > This `register_master` musst be removed. Done https://review.coreboot.org/c/flashrom/+/72057/comment/cad06811_5d9d0076 PS15, Line 177: return 0; > return the result of register_spi_master() […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 16 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Feb 2023 13:29:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by ChrisEric1 CECL (Code Review) 15 Feb '23

15 Feb '23

Attention is currently required from: ChrisEric1 CECL, Edward O'Callaghan, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#16). Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Add support for VIA VL805 USB Controller flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashrom.8.tmpl M include/programmer.h M meson.build M meson_options.txt M programmer_table.c A vl805.c 7 files changed, 229 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/16 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 16 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[master]: erasure_layout.c: Test erasefn_count before using it to allocate memory
by Thomas Heijligen (Code Review) 15 Feb '23

15 Feb '23

Thomas Heijligen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/73041 ) Change subject: erasure_layout.c: Test erasefn_count before using it to allocate memory ...................................................................... erasure_layout.c: Test erasefn_count before using it to allocate memory In erasure_layout.c:create_erase_layout() the layout will be allocated based on erasefn_count, But calling calloc with 0 is unspecified behavior. Also it is not freed when erasefn_count is 0. So test first if erasefn_count is 0, and only when not allocate the memory for *layout. Reported by Coverty Scan: *** CID 1505171: Resource leaks (RESOURCE_LEAK) /erasure_layout.c: 105 in create_erase_layout() 98 if(!layout) { 99 msg_gerr("Out of memory!\n"); 100 return -1; 101 } 102 103 if (!erasefn_count) { 104 msg_gerr("No erase functions supported\n"); >>> CID 1505171: Resource leaks (RESOURCE_LEAK) >>> Variable "layout" going out of scope leaks the storage it points to. 105 return 0; 106 } Change-Id: If13b050ac8525fee44d3f3bf74a9c9b6a8d38399 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M erasure_layout.c 1 file changed, 37 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/41/73041/1 diff --git a/erasure_layout.c b/erasure_layout.c index 05376de..2097b33 100644 --- a/erasure_layout.c +++ b/erasure_layout.c @@ -93,18 +93,17 @@ { const struct flashchip *chip = flashctx->chip; const size_t erasefn_count = count_usable_erasers(flashctx); - struct erase_layout *layout = calloc(erasefn_count, sizeof(struct erase_layout)); - - if (!layout) { - msg_gerr("Out of memory!\n"); - return -1; - } - if (!erasefn_count) { msg_gerr("No erase functions supported\n"); return 0; } + struct erase_layout *layout = calloc(erasefn_count, sizeof(struct erase_layout)); + if (!layout) { + msg_gerr("Out of memory!\n"); + return -1; + } + size_t layout_idx = 0; for (size_t eraser_idx = 0; eraser_idx < NUM_ERASEFUNCTIONS; eraser_idx++) { if (check_block_eraser(flashctx, eraser_idx, 0)) -- To view, visit https://review.coreboot.org/c/flashrom/+/73041 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If13b050ac8525fee44d3f3bf74a9c9b6a8d38399 Gerrit-Change-Number: 73041 Gerrit-PatchSet: 1 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newchange

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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by Thomas Heijligen (Code Review) 15 Feb '23

15 Feb '23

Attention is currently required from: ChrisEric1 CECL, Edward O'Callaghan, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 15: (5 comments) Patchset: PS15: One or two more rounds and we are good to go File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/33746cd0_16fbaaa1 PS15, Line 43: > "No, as this is just a type declaration and thus static doesn't have an effect […] Correct https://review.coreboot.org/c/flashrom/+/72057/comment/882dd457_43e2b8fb PS15, Line 154: msg_pdbg("VL805 firmware version 0x%08x\n", val); On some compilers we have problems with printing fixed size integers. So we must use the macros from `inttypes.h` Replace the line with: ``` msg_pdbg("VL805 firmware version %#08"PRIx32"\n", val) ``` and we are fine. https://review.coreboot.org/c/flashrom/+/72057/comment/af3c1a5a_99460a1e PS15, Line 175: register_spi_master(&spi_master_vl805, dev); This `register_master` musst be removed. https://review.coreboot.org/c/flashrom/+/72057/comment/9406e660_13d61b38 PS15, Line 177: return 0; return the result of register_spi_master() ``` data->dev = dev; return register_spi_master(&spi_master_vl805, data); } ``` -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 15 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Feb 2023 11:08:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Thomas Heijligen (Code Review) 15 Feb '23

15 Feb '23

Attention is currently required from: Felix Singer, Edward O'Callaghan, Alex Badea. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... Patch Set 5: Code-Review+2 (6 comments) Patchset: PS5: Thanks for the detailed answers. From my side it looks nearly fine. I've added a few nits. Beside that I've ordered one of those controllers and will test it in the next days. Edward, do you see something missing? File asm106x.c: https://review.coreboot.org/c/flashrom/+/73037/comment/b11e9d7b_379b19ef PS3, Line 35: {PCI_VENDOR_ID_ASMEDIA, 0x0612, OK, "ASMedia", "ASM106x"}, > Ack Ok, I'm fine with it. If someone has a chip with the other PCI-Id we can clarify it then. File asm106x.c: https://review.coreboot.org/c/flashrom/+/73037/comment/ceda25b2_76854e05 PS5, Line 47: x Please use `inttype.h` macros here for fixed length integer. We have problems with those on some compilers and a proper syntax for them comes first with c23. So for uint8_t as hex it gets ``` msg_pdbg2("asm106x status %#02"PRIx8" tries %d\n", val, timeout); ``` https://review.coreboot.org/c/flashrom/+/73037/comment/0bbecbdf_161cd28d PS5, Line 57: msg_pdbg("asm106x timed out, ctrl 0x%02x\n", val); Same here `... ctrl %#02"PRIx8"\n"` https://review.coreboot.org/c/flashrom/+/73037/comment/e9288783_f380cfe1 PS5, Line 81: msg_pdbg2("asm106x write 0x%08x chunk %u\n", val, chunk); `write %#08"PRIx32" chunk` https://review.coreboot.org/c/flashrom/+/73037/comment/838c006a_c83343a9 PS5, Line 99: msg_pdbg2("asm106x read 0x%08x chunk %u\n", val, chunk); `read %#08"PRIx32" chunk` -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 5 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Feb 2023 10:49:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: jedec.c: Fold up dst into toggle_ready_jedec()
by Edward O'Callaghan (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Stefan Reinauer, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72691 ) Change subject: jedec.c: Fold up dst into toggle_ready_jedec() ...................................................................... Patch Set 1: (1 comment) File jedec.c: https://review.coreboot.org/c/flashrom/+/72691/comment/71954a72_fddba77f PS1, Line 72: const chipaddr dst = flash->virtual_memory; > Just wondering, I see that all existing callsites have dst as `flash->virtual_memory` but is this al […] Not according to the current code. Either way it already has flashctx as a operand to the function. -- To view, visit https://review.coreboot.org/c/flashrom/+/72691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7a3fdbc6e0a888093dc8da6f5567a7301ec5040 Gerrit-Change-Number: 72691 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Wed, 15 Feb 2023 06:34:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: internal: Move parallel logic into internal_par implementation
by Edward O'Callaghan (Code Review) 14 Feb '23

14 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/71834 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: internal: Move parallel logic into internal_par implementation ...................................................................... internal: Move parallel logic into internal_par implementation The parallel internal programmer is its own implementation. Move it and call into it from the top-level internal.c programmer implementation. Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71834 Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Makefile M include/programmer.h M internal.c A internal_par.c M meson.build 5 files changed, 105 insertions(+), 60 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/Makefile b/Makefile index b37e807..16af214 100644 --- a/Makefile +++ b/Makefile @@ -584,14 +584,14 @@ ifeq ($(CONFIG_INTERNAL) $(CONFIG_INTERNAL_X86), yes yes) FEATURE_FLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o \ - internal.o it87spi.o sb600spi.o superio.o amd_imc.o wbsio_spi.o mcp6x_spi.o \ + internal.o internal_par.o it87spi.o sb600spi.o superio.o amd_imc.o wbsio_spi.o mcp6x_spi.o \ ichspi.o dmi.o known_boards.o ACTIVE_PROGRAMMERS += internal endif else ifeq ($(CONFIG_INTERNAL), yes) FEATURE_FLAGS += -D'CONFIG_INTERNAL=1' -PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o known_boards.o +PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o internal_par.o known_boards.o ACTIVE_PROGRAMMERS += internal endif endif diff --git a/include/programmer.h b/include/programmer.h index db32b2c..2a4ca76 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -387,7 +387,8 @@ /* mcp6x_spi.c */ int mcp6x_spi_init(int want_spi); - +/* internal_par.c */ +void internal_par_init(enum chipbustype buses); /* sb600spi.c */ int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev); diff --git a/internal.c b/internal.c index 07126bf..c75b472 100644 --- a/internal.c +++ b/internal.c @@ -18,9 +18,9 @@ #include <string.h> #include <stdbool.h> #include <stdlib.h> + #include "flash.h" #include "programmer.h" -#include "hwaccess_physmap.h" #include "platform/pci.h" #if defined(__i386__) || defined(__x86_64__) @@ -34,60 +34,6 @@ enum chipbustype internal_buses_supported = BUS_NONE; -static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr) -{ - mmio_writeb(val, (void *) addr); -} - -static void internal_chip_writew(const struct flashctx *flash, uint16_t val, - chipaddr addr) -{ - mmio_writew(val, (void *) addr); -} - -static void internal_chip_writel(const struct flashctx *flash, uint32_t val, - chipaddr addr) -{ - mmio_writel(val, (void *) addr); -} - -static uint8_t internal_chip_readb(const struct flashctx *flash, - const chipaddr addr) -{ - return mmio_readb((void *) addr); -} - -static uint16_t internal_chip_readw(const struct flashctx *flash, - const chipaddr addr) -{ - return mmio_readw((void *) addr); -} - -static uint32_t internal_chip_readl(const struct flashctx *flash, - const chipaddr addr) -{ - return mmio_readl((void *) addr); -} - -static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, - const chipaddr addr, size_t len) -{ - mmio_readn((void *)addr, buf, len); - return; -} - -static const struct par_master par_master_internal = { - .map_flash_region = physmap, - .unmap_flash_region = physunmap, - .chip_readb = internal_chip_readb, - .chip_readw = internal_chip_readw, - .chip_readl = internal_chip_readl, - .chip_readn = internal_chip_readn, - .chip_writeb = internal_chip_writeb, - .chip_writew = internal_chip_writew, - .chip_writel = internal_chip_writel, -}; static int get_params(const struct programmer_cfg *cfg, bool *boardenable, bool *boardmismatch, @@ -309,8 +255,7 @@ } #endif - if (internal_buses_supported & BUS_NONSPI) - register_par_master(&par_master_internal, internal_buses_supported, NULL); + internal_par_init(internal_buses_supported); /* Report if a non-whitelisted laptop is detected that likely uses a legacy bus. */ report_nonwl_laptop_detected(is_laptop, laptop_ok); diff --git a/internal_par.c b/internal_par.c new file mode 100644 index 0000000..e8e387c --- /dev/null +++ b/internal_par.c @@ -0,0 +1,79 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "programmer.h" +#include "hwaccess_physmap.h" + +static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) +{ + mmio_writeb(val, (void *) addr); +} + +static void internal_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr) +{ + mmio_writew(val, (void *) addr); +} + +static void internal_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr) +{ + mmio_writel(val, (void *) addr); +} + +static uint8_t internal_chip_readb(const struct flashctx *flash, + const chipaddr addr) +{ + return mmio_readb((void *) addr); +} + +static uint16_t internal_chip_readw(const struct flashctx *flash, + const chipaddr addr) +{ + return mmio_readw((void *) addr); +} + +static uint32_t internal_chip_readl(const struct flashctx *flash, + const chipaddr addr) +{ + return mmio_readl((void *) addr); +} + +static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len) +{ + mmio_readn((void *)addr, buf, len); + return; +} + +static const struct par_master par_master_internal = { + .map_flash_region = physmap, + .unmap_flash_region = physunmap, + .chip_readb = internal_chip_readb, + .chip_readw = internal_chip_readw, + .chip_readl = internal_chip_readl, + .chip_readn = internal_chip_readn, + .chip_writeb = internal_chip_writeb, + .chip_writew = internal_chip_writew, + .chip_writel = internal_chip_writel, +}; + +void internal_par_init(enum chipbustype buses) +{ + if (buses & BUS_NONSPI) + register_par_master(&par_master_internal, internal_buses_supported, NULL); +} diff --git a/meson.build b/meson.build index 2575fe1..d78aff9 100644 --- a/meson.build +++ b/meson.build @@ -246,6 +246,7 @@ 'board_enable.c', 'cbtable.c', 'internal.c', + 'internal_par.c', 'it87spi.c', 'sb600spi.c', 'superio.c', @@ -261,6 +262,7 @@ 'cbtable.c', 'chipset_enable.c', 'internal.c', + 'internal_par.c', 'processor_enable.c', 'pcidev.c', 'known_boards.c', -- To view, visit https://review.coreboot.org/c/flashrom/+/71834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b Gerrit-Change-Number: 71834 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Alex Badea (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Felix Singer, Thomas Heijligen. Hello Felix Singer, build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/73037 to look at the new patch set (#5). Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... asm106x: add programmer for ASM106x SATA controllers The ASMedia ASM106x series is a PCIe-SATA controller chip. It supports an attached SPI flash chip that can contain configuration and PCI option ROM. The interface is a simple shifter accessed via PCI config space, up to 4 bytes at a time. Add a programmer driver for it. Tested on a G536PCE1061V11 IO-PCE1061-V1.1 PCIe card, and a MPCE2ST-A01 VER006S mini-PCIe card, both with chips marked ASM1061, both enumerate as: 01:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02) (prog-if 01 [AHCI 1.0]) Subsystem: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:1060] Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Signed-off-by: Alex Badea <vamposdecampos(a)gmail.com> --- M Makefile A asm106x.c M flashrom.8.tmpl M include/programmer.h M meson.build M meson_options.txt M programmer_table.c M test_build.sh 8 files changed, 213 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/73037/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 5 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Alex Badea (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Felix Singer, Thomas Heijligen. Alex Badea has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... Patch Set 4: (1 comment) File asm106x.c: https://review.coreboot.org/c/flashrom/+/73037/comment/bd6e9a0f_a9dca2a8 PS3, Line 35: {PCI_VENDOR_ID_ASMEDIA, 0x0612, OK, "ASMedia", "ASM106x"}, > Well, it's interesting. […] Ack -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 4 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Wed, 15 Feb 2023 02:49:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Alex Badea (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Felix Singer, Thomas Heijligen. Alex Badea has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > Ack Not sure if product URLs should go in commit message. For posterity, these two: https://www.ebay.com/itm/204081736637 https://www.amazon.com/gp/product/B09B257HW6 -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 4 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Wed, 15 Feb 2023 02:48:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-MessageType: comment

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