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[S] Change in flashrom[master]: flashrom.c: Trivial code style fix
by Edward O'Callaghan (Code Review) 16 Feb '23

16 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72968 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: flashrom.c: Trivial code style fix ...................................................................... flashrom.c: Trivial code style fix Change-Id: Iacdb62067a8d22261d4eabe73ad96168eb11417c Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72968 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sam McNally <sammc(a)google.com> --- M flashrom.c 1 file changed, 14 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Sam McNally: Looks good to me, approved diff --git a/flashrom.c b/flashrom.c index d17e04b..62e5757 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1282,8 +1282,7 @@ ret = 1; } } - if(curr_eraseblock_count > prev_eraseblock_count) - { + if (curr_eraseblock_count > prev_eraseblock_count) { msg_gerr("ERROR: Flash chip %s erase function %i is not " "in order. Please report a bug at flashrom(a)flashrom.org\n", chip->name, k); -- To view, visit https://review.coreboot.org/c/flashrom/+/72968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iacdb62067a8d22261d4eabe73ad96168eb11417c Gerrit-Change-Number: 72968 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: cli_classic.c: Drop spurious cast
by Edward O'Callaghan (Code Review) 16 Feb '23

16 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72966 ) Change subject: cli_classic.c: Drop spurious cast ...................................................................... cli_classic.c: Drop spurious cast This cast should not be required. Change-Id: Ia3a658dd6f4986eb6da84a11bce66f53e1571469 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72966 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sam McNally <sammc(a)google.com> --- M cli_classic.c 1 file changed, 16 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Sam McNally: Looks good to me, approved diff --git a/cli_classic.c b/cli_classic.c index c72836f..da68919 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -662,8 +662,7 @@ * chip when a flash device gets opened with fd 1 or 2. */ if (check_file(stdout) && check_file(stderr)) { - flashrom_set_log_callback( - (flashrom_log_callback *)&flashrom_print_cb); + flashrom_set_log_callback(&flashrom_print_cb); } print_version(); -- To view, visit https://review.coreboot.org/c/flashrom/+/72966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia3a658dd6f4986eb6da84a11bce66f53e1571469 Gerrit-Change-Number: 72966 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[L] Change in flashrom[master]: jedec.c: Move printlock stuff into printlock.c
by Edward O'Callaghan (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Stefan Reinauer. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72607 ) Change subject: jedec.c: Move printlock stuff into printlock.c ...................................................................... Patch Set 2: (1 comment) File printlock.c: https://review.coreboot.org/c/flashrom/+/72607/comment/d76f8c8f_616401a3 PS1, Line 4: * Copyright (C) 2000 Silicon Integrated System Corporation : * Copyright (C) 2006 Giampiero Giancipoli <gianci(a)email.it> : * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> : * Copyright (C) 2007-2012 Carl-Daniel Hailfinger : * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> : * Copyright (C) 2014 Stefan Tauner > honestly no idea. Ack -- To view, visit https://review.coreboot.org/c/flashrom/+/72607 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iacaa16c81e141aac30feb6871700c4fdc9eec8e9 Gerrit-Change-Number: 72607 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Thu, 16 Feb 2023 22:45:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: jedec.c: Consolidate op,operand sequencing into func
by Edward O'Callaghan (Code Review) 16 Feb '23

16 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72502 ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Consolidate op,operand sequencing into func ...................................................................... jedec.c: Consolidate op,operand sequencing into func Change-Id: I9a1b211b49777f6d7f62a052975c1759e036c8df Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72502 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 37 insertions(+), 57 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index e97468e..3f27337 100644 --- a/jedec.c +++ b/jedec.c @@ -280,30 +280,31 @@ return 1; } -int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size) +static void issuecmd(const struct flashctx *flash, uint8_t op, unsigned int operand) { - chipaddr bios = flash->virtual_memory; + const chipaddr bios = flash->virtual_memory; bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); const unsigned int mask = getaddrmask(flash->chip); - unsigned int delay_us = 0; + unsigned int delay_us = (flash->chip->probe_timing == TIMING_ZERO) ? 0 : 10; - if(flash->chip->probe_timing != TIMING_ZERO) - delay_us = 10; + if (!operand) + operand = (shifted ? 0x2AAA : 0x5555) & mask; + + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); + programmer_delay(flash, delay_us); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); + programmer_delay(flash, delay_us); + chip_writeb(flash, op, bios + operand); + programmer_delay(flash, delay_us); +} + +int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size) +{ + const chipaddr bios = flash->virtual_memory; /* Issue the Sector Erase command */ - chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - - chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x30, bios + page); - programmer_delay(flash, delay_us); + issuecmd(flash, 0x80, 0); + issuecmd(flash, 0x30, page); /* wait for Toggle bit ready */ toggle_ready_jedec_slow(flash, bios); @@ -314,28 +315,11 @@ int erase_block_jedec(struct flashctx *flash, unsigned int block, unsigned int size) { - chipaddr bios = flash->virtual_memory; - bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); - const unsigned int mask = getaddrmask(flash->chip); - unsigned int delay_us = 0; - - if(flash->chip->probe_timing != TIMING_ZERO) - delay_us = 10; + const chipaddr bios = flash->virtual_memory; /* Issue the Sector Erase command */ - chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - - chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x50, bios + block); - programmer_delay(flash, delay_us); + issuecmd(flash, 0x80, 0); + issuecmd(flash, 0x50, block); /* wait for Toggle bit ready */ toggle_ready_jedec_slow(flash, bios); @@ -347,10 +331,7 @@ /* erase chip with block_erase() prototype */ int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr, unsigned int blocksize) { - const unsigned int mask = getaddrmask(flash->chip); const chipaddr bios = flash->virtual_memory; - const bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); - unsigned int delay_us = 0; if ((addr != 0) || (blocksize != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", @@ -358,23 +339,9 @@ return -1; } - if(flash->chip->probe_timing != TIMING_ZERO) - delay_us = 10; - /* Issue the JEDEC Chip Erase command */ - chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - - chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); - programmer_delay(flash, delay_us); - chip_writeb(flash, 0x10, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - programmer_delay(flash, delay_us); + issuecmd(flash, 0x80, 0); + issuecmd(flash, 0x10, 0); toggle_ready_jedec_slow(flash, bios); -- To view, visit https://review.coreboot.org/c/flashrom/+/72502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9a1b211b49777f6d7f62a052975c1759e036c8df Gerrit-Change-Number: 72502 Gerrit-PatchSet: 6 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by Edward O'Callaghan (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: ChrisEric1 CECL, Thomas Heijligen. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 20: Code-Review+1 (14 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/ecdcf810_0d5e0527 PS18, Line 70: unsigned int i, j; > just scope iterators to loops. delete File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/5aa6ae39_d2968a36 PS20, Line 24: #include "programmer.h" : #include "spi.h" : #include "flash.h" : #include "platform/pci.h" : #include <stdlib.h> ``` #include <stdlib.h> include ".." ``` alphabetical ordering. https://review.coreboot.org/c/flashrom/+/72057/comment/dd452a66_ff28f1bd PS20, Line 70: uint32_t outdata; : uint32_t indata; delete https://review.coreboot.org/c/flashrom/+/72057/comment/be6fe83f_c44f08c9 PS20, Line 75: for (j = 0; j < writecnt; j += 4) { `for (unsigned int i = 0; i < writecnt; i += 4) {` https://review.coreboot.org/c/flashrom/+/72057/comment/8f215d59_2cd4a4b4 PS20, Line 76: j i https://review.coreboot.org/c/flashrom/+/72057/comment/16850d1a_0ec3e161 PS20, Line 76: u const https://review.coreboot.org/c/flashrom/+/72057/comment/4105d6f8_2498ef9b PS20, Line 77: o you can just do: `uint32_t data = 0;` https://review.coreboot.org/c/flashrom/+/72057/comment/8bd7c0f8_548b221c PS20, Line 78: for (i = 0; i < curwritecnt; i++) { `for (unsigned int j = 0; j < curwritecnt; j++) {` https://review.coreboot.org/c/flashrom/+/72057/comment/4add081c_8cfce578 PS20, Line 89: for (j = 0; j < readcnt; j += 4) { `for (unsigned int i = 0; i < readcnt; i += 4) {` https://review.coreboot.org/c/flashrom/+/72057/comment/86bc9f9b_fcefb4f5 PS20, Line 90: j i https://review.coreboot.org/c/flashrom/+/72057/comment/30e415e1_236797cd PS20, Line 90: u const https://review.coreboot.org/c/flashrom/+/72057/comment/0f1986d2_caed8785 PS20, Line 92: indata `uint32_t data =` https://review.coreboot.org/c/flashrom/+/72057/comment/927efce4_e21418ab PS20, Line 93: for (i = 0; i < curreadcnt; i++) { `for (unsigned int j = 0; j < curreadcnt; j++) {` https://review.coreboot.org/c/flashrom/+/72057/comment/87d8f565_e1c9020e PS20, Line 94: i j -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 20 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Thu, 16 Feb 2023 22:42:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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[L] Change in flashrom[master]: ch347_spi.c: Add initial support for the WCH CH347
by Nicholas Chin (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Thomas Heijligen, Angel Pons, qianfan. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70573 ) Change subject: ch347_spi.c: Add initial support for the WCH CH347 ...................................................................... Patch Set 3: (1 comment) File ch347_spi.c: https://review.coreboot.org/c/flashrom/+/70573/comment/8655d8f4_05c42a9d PS3, Line 261: 64 * 1024 > With the CH347, you can basically read an unlimited amount of bytes with one command. […] I was reading over some of Thomas's comments in CB:72057 (Patchset 19, lines 120 and 121) and it seems like these can be replaced with `MAX_DATA_READ_UNLIMITED` and `MAX_DATA_WRITE_UNLIMITED` -- To view, visit https://review.coreboot.org/c/flashrom/+/70573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba Gerrit-Change-Number: 70573 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexander Goncharov <chat(a)joursoir.net> Gerrit-CC: qianfan <qianfanguijin(a)163.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: qianfan <qianfanguijin(a)163.com> Gerrit-Comment-Date: Thu, 16 Feb 2023 19:17:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by Nicholas Chin (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: ChrisEric1 CECL, Thomas Heijligen, Edward O'Callaghan. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 20: (1 comment) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/9a49faa9_d7ad1c32 PS19, Line 91: curreadcnt = min(4, readcnt - j); > I did this so it would compile, and its just what I did before, just a different name of course: […] Ah right, I had a spurious `unsigned int` copied there -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 20 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Thu, 16 Feb 2023 19:15:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by ChrisEric1 CECL (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 19: (4 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/a9b7085d_e109fcab PS19, Line 72: unsigned int curreadcnt; > Delete, similar to what you did for curwritecnt before Done https://review.coreboot.org/c/flashrom/+/72057/comment/e65bea63_c89d74d8 PS19, Line 91: curreadcnt = min(4, readcnt - j); > Change to `uint32_t unsigned int curreadcnt;`, similar to what you did for `curwritecnt` above I did this so it would compile, and its just what I did before, just a different name of course: uint32_t curreadcnt = min(4, readcnt - j); https://review.coreboot.org/c/flashrom/+/72057/comment/caa1639e_84d7ca15 PS19, Line 120: 64 * 1024, /* Maximum data read size in one go (excluding opcode+address). */ > This can be `MAX_DATA_READ_UNLIMITED` Done https://review.coreboot.org/c/flashrom/+/72057/comment/8ae5bbce_5b956fe2 PS19, Line 121: 256, /* Maximum data write size in one go (excluding opcode+address). */ > This can be `MAX_DATA_WRITE_UNLIMITED` Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 19 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Thu, 16 Feb 2023 19:02:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by ChrisEric1 CECL (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: ChrisEric1 CECL, Edward O'Callaghan. Hello build bot (Jenkins), Thomas Heijligen, Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#20). Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Add support for VIA VL805 USB Controller flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashrom.8.tmpl M include/programmer.h M meson.build M meson_options.txt M programmer_table.c A vl805.c 7 files changed, 214 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/20 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 20 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: serial: Add Darwin/macOS support for custom and >230400 baudrates
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70571 ) ( 7 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: serial: Add Darwin/macOS support for custom and >230400 baudrates ...................................................................... serial: Add Darwin/macOS support for custom and >230400 baudrates This change is based on the patch proposed by Denis Ahrens in https://review.coreboot.org/c/flashrom/+/67822 Change-Id: I3e6b88d2b4c2a130b16456752681fd9f807bf6f0 Signed-off-by: Peter Stuge <peter(a)stuge.se> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70571 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> --- M Makefile A custom_baud_darwin.c M meson.build M serial.c 4 files changed, 87 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved diff --git a/Makefile b/Makefile index 16af214..25c01e0 100644 --- a/Makefile +++ b/Makefile @@ -844,9 +844,13 @@ ifeq ($(TARGET_OS), Linux) LIB_OBJS += custom_baud_linux.o else +ifeq ($(TARGET_OS), Darwin) +LIB_OBJS += custom_baud_darwin.o +else LIB_OBJS += custom_baud.o endif endif +endif USE_SOCKETS := $(if $(call filter_deps,$(DEPENDS_ON_SOCKETS)),yes,no) ifeq ($(USE_SOCKETS), yes) diff --git a/custom_baud_darwin.c b/custom_baud_darwin.c new file mode 100644 index 0000000..e8764dd --- /dev/null +++ b/custom_baud_darwin.c @@ -0,0 +1,61 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2022 Peter Stuge <peter(a)stuge.se> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <termios.h> +#include <sys/ioctl.h> +#include <IOKit/serial/ioss.h> +#include <errno.h> + +#include "custom_baud.h" + +int use_custom_baud(unsigned int baud, const struct baudentry *baudtable) +{ + int i; + + if (baud > 230400) + return 1; + + for (i = 0; baudtable[i].baud; i++) { + if (baudtable[i].baud == baud) + return 0; + + if (baudtable[i].baud > baud) + return 1; + } + + return 1; +} + +int set_custom_baudrate(int fd, unsigned int baud, const enum custom_baud_stage stage, void *tio_wanted) +{ + struct termios *wanted; + speed_t speed; + + switch (stage) { + case BEFORE_FLAGS: + break; + + case WITH_FLAGS: + wanted = tio_wanted; + return cfsetspeed(wanted, B19200); + + case AFTER_FLAGS: + speed = baud; + return ioctl(fd, IOSSIOSPEED, &speed); + } + + return 0; +} diff --git a/meson.build b/meson.build index 92c5590..2f11c3f 100644 --- a/meson.build +++ b/meson.build @@ -103,6 +103,8 @@ if host_machine.system() == 'linux' custom_baud_c = 'custom_baud_linux.c' +elif host_machine.system() == 'darwin' + custom_baud_c = 'custom_baud_darwin.c' else custom_baud_c = 'custom_baud.c' endif diff --git a/serial.c b/serial.c index b9ce2b3..10d739a 100644 --- a/serial.c +++ b/serial.c @@ -47,6 +47,10 @@ * On Linux there is a non-standard way to use arbitrary baud rates that we use if there is no * matching standard rate, see custom_baud.c * + * On Darwin there is also a non-standard ioctl() to set arbitrary baud rates + * and any above 230400, see custom_baud_darwin.c and + * https://opensource.apple.com/source/IOSerialFamily/IOSerialFamily-91/tests/… + * * On Windows there exist similar macros (starting with CBR_ instead of B) but they are only defined for * backwards compatibility and the API supports arbitrary baud rates in the same manner as the macros, see * http://msdn.microsoft.com/en-us/library/windows/desktop/aa363214(v=vs.85).a… -- To view, visit https://review.coreboot.org/c/flashrom/+/70571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3e6b88d2b4c2a130b16456752681fd9f807bf6f0 Gerrit-Change-Number: 70571 Gerrit-PatchSet: 9 Gerrit-Owner: Peter Stuge <peter(a)stuge.se> Gerrit-Reviewer: Name of user not set #1004601 Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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