- flashrom-gerrit - mail.coreboot.org

[M] Change in flashrom[master]: serial: Call set_custom_baudrate() thrice
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70569 ) Change subject: serial: Call set_custom_baudrate() thrice ...................................................................... serial: Call set_custom_baudrate() thrice Call the function before tcsetattr() settings are known, then again with settings prepared but not yet applied and finally a third time after tcsetattr(). Darwin support needs this change; there custom_baud code must be called to modify the settings passed to tcsetattr() and then again after tcsetattr() returns. The change should be non-functional on all currently supported systems; current code calls set_custom_baudrate() before any tcsetattr() settings are prepared, so we have three stages in total. This change originates from discussion of the macOS patch proposed by Denis Ahrens in https://review.coreboot.org/c/flashrom/+/67822 Change-Id: I40cc443cfb7bf6b212b31826d437b898cc13c427 Signed-off-by: Peter Stuge <peter(a)stuge.se> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70569 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> --- M custom_baud.c M custom_baud_linux.c M include/custom_baud.h M serial.c 4 files changed, 55 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved diff --git a/custom_baud.c b/custom_baud.c index 28f182c..8bbe6cc 100644 --- a/custom_baud.c +++ b/custom_baud.c @@ -19,7 +19,7 @@ #include "custom_baud.h" /* Stub, should not get called. */ -int set_custom_baudrate(int fd, unsigned int baud) +int set_custom_baudrate(int fd, unsigned int baud, const enum custom_baud_stage stage, void *tio_wanted) { errno = ENOSYS; /* Hoping "Function not supported" will make you look here. */ return -1; diff --git a/custom_baud_linux.c b/custom_baud_linux.c index 2d5f261..761d496 100644 --- a/custom_baud_linux.c +++ b/custom_baud_linux.c @@ -29,9 +29,13 @@ * for more info. */ -int set_custom_baudrate(int fd, unsigned int baud) +int set_custom_baudrate(int fd, unsigned int baud, const enum custom_baud_stage stage, void *tio_wanted) { struct termios2 tio; + + if (stage != BEFORE_FLAGS) + return 0; + if (ioctl(fd, TCGETS2, &tio)) { return -1; } diff --git a/include/custom_baud.h b/include/custom_baud.h index c8b8fc2..38e6cfc 100644 --- a/include/custom_baud.h +++ b/include/custom_baud.h @@ -22,7 +22,13 @@ unsigned int baud; }; -int set_custom_baudrate(int fd, unsigned int baud); +enum custom_baud_stage { + BEFORE_FLAGS = 0, + WITH_FLAGS, + AFTER_FLAGS +}; + +int set_custom_baudrate(int fd, unsigned int baud, const enum custom_baud_stage stage, void *tio_wanted); /* Returns 1 if non-exact rate would be used, and setting a custom rate is supported. The baudtable must be in ascending order and terminated with a 0-baud entry. */ diff --git a/serial.c b/serial.c index a0ef632..b9ce2b3 100644 --- a/serial.c +++ b/serial.c @@ -179,6 +179,7 @@ } msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); #else + int custom_baud = (baud >= 0 && use_custom_baud(baud, sp_baudtable)); struct termios wanted, observed; if (tcgetattr(fd, &observed) != 0) { msg_perr_strerror("Could not fetch original serial port configuration: "); @@ -186,8 +187,8 @@ } wanted = observed; if (baud >= 0) { - if (use_custom_baud(baud, sp_baudtable)) { - if (set_custom_baudrate(fd, baud)) { + if (custom_baud) { + if (set_custom_baudrate(fd, baud, BEFORE_FLAGS, NULL)) { msg_perr_strerror("Could not set custom baudrate: "); return 1; } @@ -198,7 +199,6 @@ msg_perr_strerror("Could not fetch serial port configuration: "); return 1; } - msg_pdbg("Using custom baud rate.\n"); } else { const struct baudentry *entry = round_baud(baud); if (cfsetispeed(&wanted, entry->flag) != 0 || cfsetospeed(&wanted, entry->flag) != 0) { @@ -212,6 +212,10 @@ wanted.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG | IEXTEN); wanted.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); wanted.c_oflag &= ~OPOST; + if (custom_baud && set_custom_baudrate(fd, baud, WITH_FLAGS, &wanted)) { + msg_perr_strerror("Could not set custom baudrate: "); + return 1; + } if (tcsetattr(fd, TCSANOW, &wanted) != 0) { msg_perr_strerror("Could not change serial port configuration: "); return 1; @@ -236,6 +240,13 @@ (long)observed.c_oflag, (long)wanted.c_oflag ); } + if (custom_baud) { + if (set_custom_baudrate(fd, baud, AFTER_FLAGS, &wanted)) { + msg_perr_strerror("Could not set custom baudrate: "); + return 1; + } + msg_pdbg("Using custom baud rate.\n"); + } if (cfgetispeed(&observed) != cfgetispeed(&wanted) || cfgetospeed(&observed) != cfgetospeed(&wanted)) { msg_pwarn("Could not set baud rates exactly.\n"); -- To view, visit https://review.coreboot.org/c/flashrom/+/70569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I40cc443cfb7bf6b212b31826d437b898cc13c427 Gerrit-Change-Number: 70569 Gerrit-PatchSet: 5 Gerrit-Owner: Peter Stuge <peter(a)stuge.se> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Name of user not set #1004601 Gerrit-MessageType: merged

1 0

[S] Change in flashrom[master]: meson: Determine custom_baud source file only once
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70568 ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: meson: Determine custom_baud source file only once ...................................................................... meson: Determine custom_baud source file only once Change-Id: I13221bdca7d14a483f416e81e3830a495659a85e Signed-off-by: Peter Stuge <peter(a)stuge.se> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70568 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> --- M meson.build 1 file changed, 23 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Thomas Heijligen: Looks good to me, approved diff --git a/meson.build b/meson.build index d78aff9..92c5590 100644 --- a/meson.build +++ b/meson.build @@ -101,6 +101,12 @@ add_project_arguments('-DIS_WINDOWS=0', language : 'c') endif +if host_machine.system() == 'linux' + custom_baud_c = 'custom_baud_linux.c' +else + custom_baud_c = 'custom_baud.c' +endif + systems_hwaccess = [ 'linux', 'openbsd', 'freebsd', 'dragonfly', 'netbsd' ] systems_serial = [ 'linux', 'openbsd', 'freebsd', 'dragonfly', 'netbsd', 'darwin' ] @@ -175,7 +181,7 @@ 'buspirate_spi' : { 'systems' : systems_serial, 'groups' : [ group_serial, group_external ], - 'srcs' : files('buspirate_spi.c', 'serial.c', (host_machine.system() == 'linux' ? 'custom_baud_linux.c' : 'custom_baud.c')), + 'srcs' : files('buspirate_spi.c', 'serial.c', custom_baud_c), 'flags' : [ '-DCONFIG_BUSPIRATE_SPI=1' ], }, 'ch341a_spi' : { @@ -391,7 +397,7 @@ 'pony_spi' : { 'systems' : systems_serial, 'groups' : [ group_serial, group_external ], - 'srcs' : files('pony_spi.c', 'serial.c', (host_machine.system() == 'linux' ? 'custom_baud_linux.c' : 'custom_baud.c')), + 'srcs' : files('pony_spi.c', 'serial.c', custom_baud_c), 'flags' : [ '-DCONFIG_PONY_SPI=1' ], }, 'raiden_debug_spi' : { @@ -435,7 +441,7 @@ 'serprog' : { 'systems' : systems_serial, 'groups' : [ group_serial, group_external ], - 'srcs' : files('serprog.c', 'serial.c', (host_machine.system() == 'linux' ? 'custom_baud_linux.c' : 'custom_baud.c')), + 'srcs' : files('serprog.c', 'serial.c', custom_baud_c), 'flags' : [ '-DCONFIG_SERPROG=1' ], }, 'stlinkv3_spi' : { -- To view, visit https://review.coreboot.org/c/flashrom/+/70568 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I13221bdca7d14a483f416e81e3830a495659a85e Gerrit-Change-Number: 70568 Gerrit-PatchSet: 6 Gerrit-Owner: Peter Stuge <peter(a)stuge.se> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[S] Change in flashrom[master]: Add missing Intel B460 flash chip id
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72056 ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: Add missing Intel B460 flash chip id ...................................................................... Add missing Intel B460 flash chip id Note that while I can read the chip, on my Lenovo Legion T5 28IMB05, cannot write to the flash chip with any tools except upgrading with vendor tool, no downgrades are allowed, due to the fact of SMM, even if I did manage to flash the BIOS chip somehow, would still face bootguard since this machine has bootguard. But if I read the chip, and verify my read bin file, it works fine, until changing the SMBIOS, which is in the vendor BIOS update package. Change-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72056 Reviewed-by: Thomas Heijligen <src(a)posteo.de> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M chipset_enable.c 1 file changed, 23 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Thomas Heijligen: Looks good to me, approved diff --git a/chipset_enable.c b/chipset_enable.c index 480113a..e1dd6a3 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2152,6 +2152,7 @@ {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, {0x8086, 0x3482, B_S, DEP, "Intel", "Ice Lake U Premium", enable_flash_pch300}, + {0x8086, 0xa3c8, B_S, OK, "Intel", "B460", enable_flash_pch400}, {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch400}, {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch400}, {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch400}, -- To view, visit https://review.coreboot.org/c/flashrom/+/72056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca Gerrit-Change-Number: 72056 Gerrit-PatchSet: 7 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: merged

1 0

[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Felix Singer, Edward O'Callaghan, Alex Badea. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 6 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Comment-Date: Thu, 16 Feb 2023 17:20:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Felix Singer, Edward O'Callaghan, Alex Badea. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... Patch Set 6: Verified+1 (1 comment) Patchset: PS6: Tested successfully. Read write and erase with a puya spi flash found as "SFDP-capable". Same PCI-Id chip number combo as in the commit message. -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 6 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Comment-Date: Thu, 16 Feb 2023 17:18:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by Thomas Heijligen (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: ChrisEric1 CECL, Edward O'Callaghan. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 19: Verified+1 (3 comments) Patchset: PS19: Tested successfully on the VIA Labs Inc. VIA VL805-QFN68 VL0127A reference card. Read write and erase successfully on an MACRONIX MX25L1006E, recognized as "SFDP-capable chip" by flashrom File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/ee5f6706_b7c811fd PS19, Line 120: 64 * 1024, /* Maximum data read size in one go (excluding opcode+address). */ This can be `MAX_DATA_READ_UNLIMITED` https://review.coreboot.org/c/flashrom/+/72057/comment/698b01a2_f777a5f5 PS19, Line 121: 256, /* Maximum data write size in one go (excluding opcode+address). */ This can be `MAX_DATA_WRITE_UNLIMITED` -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 19 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Thu, 16 Feb 2023 17:05:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by Nicholas Chin (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: ChrisEric1 CECL, Thomas Heijligen, Edward O'Callaghan. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 19: (2 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/101f1f99_4fcc96a4 PS19, Line 72: unsigned int curreadcnt; Delete, similar to what you did for curwritecnt before https://review.coreboot.org/c/flashrom/+/72057/comment/a16670b1_8d7591ed PS19, Line 91: curreadcnt = min(4, readcnt - j); Change to `uint32_t unsigned int curreadcnt;`, similar to what you did for `curwritecnt` above -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 19 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Thu, 16 Feb 2023 14:29:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by ChrisEric1 CECL (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Thomas Heijligen, Edward O'Callaghan, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Patch Set 18: (10 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/4f66e642_91911aa2 PS18, Line 58: > drop \n line 58. Done https://review.coreboot.org/c/flashrom/+/72057/comment/f428c03a_7919772e PS18, Line 79: curwritecnt = min(4, writecnt - j); > .. i.e. […] Done https://review.coreboot.org/c/flashrom/+/72057/comment/1fb54f7d_9f234418 PS18, Line 107: programmer > `_mcu_` ? vl805_mcu_active? Ok (changed the 3 matches to compile) https://review.coreboot.org/c/flashrom/+/72057/comment/439a17f3_bef788b8 PS18, Line 117: /* Shutdown stuff. */ > remove, adds no value. Done https://review.coreboot.org/c/flashrom/+/72057/comment/84c6e6f1_ae37cef8 PS18, Line 118: dev > just pass `vl805_data->dev` it is already well-typed. Done https://review.coreboot.org/c/flashrom/+/72057/comment/1ff90547_cec9a51c PS18, Line 130: .write_aai = default_spi_write_aai, > no need for this default hook, see CB:67479 Done https://review.coreboot.org/c/flashrom/+/72057/comment/a0fa6074_0f8e1a88 PS18, Line 141: > ditto Done (removed \n) https://review.coreboot.org/c/flashrom/+/72057/comment/4eb646f7_99631543 PS18, Line 146: > nit: drop this \n Done https://review.coreboot.org/c/flashrom/+/72057/comment/31ecb4f3_e5db08e8 PS18, Line 158: vl805_programmer_active(dev, 0x1) > you seem to toggle on on line 152, read fw rev, toggle off and then immediately back on again? removed : vl805_programmer_active(dev, 0x0); /* Some sort of init sequence, just copied from the logs. */ vl805_programmer_active(dev, 0x1); https://review.coreboot.org/c/flashrom/+/72057/comment/f9522c2e_d4b435dc PS18, Line 171: vl805_programmer_active(dev, 0x0); : : vl805_programmer_active(dev, 0x1); : > same here? if this is from a trace it could be from some silly OOP structure that always does a togg […] removed: vl805_programmer_active(dev, 0x0); vl805_programmer_active(dev, 0x1); -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 18 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Thu, 16 Feb 2023 13:49:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

1 0

[M] Change in flashrom[master]: Add support for VIA VL805 USB Controller flashing
by ChrisEric1 CECL (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: ChrisEric1 CECL, Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#19). Change subject: Add support for VIA VL805 USB Controller flashing ...................................................................... Add support for VIA VL805 USB Controller flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashrom.8.tmpl M include/programmer.h M meson.build M meson_options.txt M programmer_table.c A vl805.c 7 files changed, 215 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/19 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 19 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in flashrom[master]: writeprotect: Add function to get register values and WP bit masks
by Sergii Dmytruk (Code Review) 16 Feb '23

16 Feb '23

Attention is currently required from: Edward O'Callaghan, Nikolai Artemiev, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69847 ) Change subject: writeprotect: Add function to get register values and WP bit masks ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/69847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib2a47153b230c9f82bb4eca357c335f2abbacc20 Gerrit-Change-Number: 69847 Gerrit-PatchSet: 9 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 16 Feb 2023 13:05:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

2025

2024

2023

2022

2021

2020

2019

2018

2017

flashrom-gerrit