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[M] Change in flashrom[master]: meson: use cfg_data for to evaluate cflags
by Edward O'Callaghan (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Thomas Heijligen. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72656 ) Change subject: meson: use cfg_data for to evaluate cflags ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/72656/comment/da765064_703cab26 PS1, Line 7: use cfg_data for to evaluate cflags there is a bit more going on here like the version switching from the meson project to something decent so maybe just elaborate a bit. File meson.build: https://review.coreboot.org/c/flashrom/+/72656/comment/b9b6137e_269b66bc PS1, Line 481: : config.set('CONFIG_DEFAULT_PROGRAMMER_NAME', get_option('default_programmer_name') != '' ? '&programmer_' + get_option('default_programmer_name') : 'NULL') not sure I like the embedded ternary operator use in this case, could it be assigned to a intermediate for clarity? But whatever, it isn't a big deal. -- To view, visit https://review.coreboot.org/c/flashrom/+/72656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie91b4e1377b9d6d347511d4727c0a26a314b1e57 Gerrit-Change-Number: 72656 Gerrit-PatchSet: 1 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Tue, 14 Feb 2023 11:01:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in flashrom[master]: meson: use cfg_data for to evaluate cflags
by Edward O'Callaghan (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Thomas Heijligen. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72656 ) Change subject: meson: use cfg_data for to evaluate cflags ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie91b4e1377b9d6d347511d4727c0a26a314b1e57 Gerrit-Change-Number: 72656 Gerrit-PatchSet: 1 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Tue, 14 Feb 2023 10:58:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by Thomas Heijligen (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 11: (1 comment) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/fc88988c_7078d5c6 PS3, Line 38: static struct pci_dev *dev = NULL; > Here is my broken progress: https://gist.githubusercontent. […] Yes, you have to define an custom data struct which is passed along. Have a look at this patch https://review.coreboot.org/c/flashrom/+/73037/3/asm106x.c In line 30 is a data structure defined. This get initialized in the init function from line 138ff, transfered to the allocated data structure and then registered in line 154 together with the spi_master. The `...spi_send_command` function has access to this data. There you've done it almost right. The data gets then passed on to all internal functions of the programmer. `asm106x_wait_ready()` in case of the link above and the `vl805_setregval()` etc functions in your case. So they will be extended to take a `struct pci_dev*` as argument instead of using the global. It will become `static void vl805_setregval(const struct pci_dev *dev, int reg, uint32_t val)` I hope this helps you 😊 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 11 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Tue, 14 Feb 2023 10:39:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Thomas Heijligen (Code Review) 14 Feb '23

14 Feb '23

Attention is currently required from: Felix Singer, Alex Badea. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... Patch Set 3: (7 comments) Patchset: PS3: Hi Alex, thank you for the contribution! The code looks already quite good. Anyway I have a questions and some minor annotations. On which device have you tested this driver? Can you mention it in the commit message. File asm106x.c: https://review.coreboot.org/c/flashrom/+/73037/comment/ba48e766_d6e120a3 PS3, Line 35: {PCI_VENDOR_ID_ASMEDIA, 0x0612, OK, "ASMedia", "ASM106x"}, This PCI-Id is assigned to the ASM1062 Serial ATA Controller, the PCI-Id 0x625 is assigned to '106x SATA/RAID Controller'. Beside that there is a PCI-Id 0x0611 for 'ASM1061 SATA IDE Controller'. For which one is this driver? Or does it work on all of them? PCI-Ids from pciutils (https://pci-ids.ucw.cz/v2.2/pci.ids) https://review.coreboot.org/c/flashrom/+/73037/comment/9db02c32_d99bd84a PS3, Line 51: programmer_delay(flash, 10); `programmer_delay()` should be used outside of the programmer. It is there to determine if an programmer specific delay function should be called or the default one. Here you can use `void default_delay(unsigned int usec)`. With it you can also pass only the `struct pci_dev *pci` to this function. ``` static int asm106x_wait_ready(const struct pci_dev *pci, uint8_t *pval) ``` https://review.coreboot.org/c/flashrom/+/73037/comment/b1ebaf4f_82ac445b PS3, Line 59: if (pval) You could move this 'if, assignment, return' where the break is. Then everything below the loop is a timeout. https://review.coreboot.org/c/flashrom/+/73037/comment/5522f531_3ac722ae PS3, Line 74: writecnt, readcnt); This can be moved in the line above. https://review.coreboot.org/c/flashrom/+/73037/comment/6156e402_58c4eb14 PS3, Line 115: ctrl | ASM106X_CTRL_CSN); This function call can be in one line File meson.build: https://review.coreboot.org/c/flashrom/+/73037/comment/7143d1a9_afdb5109 PS3, Line 152: 'cpu_families' : cpus_port_io, This line should be removed. The driver uses only PCI register to communicate with the flash, not I/O ports. -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 3 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Comment-Date: Tue, 14 Feb 2023 10:20:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Alex Badea (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Felix Singer, Thomas Heijligen, Alex Badea. Hello Felix Singer, build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/73037 to look at the new patch set (#3). Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... asm106x: add programmer for ASM106x SATA controllers The ASMedia ASM106x series is a PCIe-SATA controller chip. It supports an attached SPI flash chip that can contain configuration and PCI option ROM. The interface is a simple shifter accessed via PCI config space, up to 4 bytes at a time. Add a programmer driver for it. Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Signed-off-by: Alex Badea <vamposdecampos(a)gmail.com> --- M Makefile A asm106x.c M flashrom.8.tmpl M include/programmer.h M meson.build M meson_options.txt M programmer_table.c M test_build.sh 8 files changed, 212 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/73037/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 3 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Alex Badea (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Felix Singer, Thomas Heijligen. Hello Felix Singer, Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/73037 to look at the new patch set (#2). Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... asm106x: add programmer for ASM106x SATA controllers The ASMedia ASM106x series is a PCIe-SATA controller chip. It supports an attached SPI flash chip that can contain configuration and PCI option ROM. The interface is a simple shifter accessed via PCI config space, up to 4 bytes at a time. Add a programmer driver for it. Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Signed-off-by: Alex Badea <vamposdecampos(a)gmail.com> --- M Makefile A asm106x.c M flashrom.8.tmpl M include/programmer.h M meson.build M programmer_table.c M test_build.sh 7 files changed, 206 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/73037/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 2 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: asm106x: add programmer for ASM106x SATA controllers
by Alex Badea (Code Review) 13 Feb '23

13 Feb '23

Alex Badea has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/73037 ) Change subject: asm106x: add programmer for ASM106x SATA controllers ...................................................................... asm106x: add programmer for ASM106x SATA controllers The ASMedia ASM106x series is a PCIe-SATA controller chip. It supports an attached SPI flash chip that can contain configuration and PCI option ROM. The interface is a simple shifter accessed via PCI config space, up to 4 bytes at a time. Add a programmer driver for it. Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Signed-off-by: Alex Badea <vamposdecampos(a)gmail.com> --- M Makefile A asm106x.c M flashrom.8.tmpl M include/programmer.h M meson.build M programmer_table.c M test_build.sh 7 files changed, 206 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/73037/1 diff --git a/Makefile b/Makefile index b37e807..75ffeee 100644 --- a/Makefile +++ b/Makefile @@ -137,6 +137,7 @@ CONFIG_SATAMV \ DEPENDS_ON_LIBPCI := \ + CONFIG_ASM106X \ CONFIG_ATAHPT \ CONFIG_ATAPROMISE \ CONFIG_ATAVIA \ @@ -437,6 +438,9 @@ # Always enable SiI SATA controllers for now. CONFIG_SATASII ?= yes +# Asmedia ASM106x +CONFIG_ASM106X ?= yes + # Highpoint (HPT) ATA/RAID controller support. # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no @@ -642,6 +646,12 @@ ACTIVE_PROGRAMMERS += satasii endif +ifeq ($(CONFIG_ASM106X), yes) +FEATURE_FLAGS += -D'CONFIG_ASM106X=1' +PROGRAMMER_OBJS += asm106x.o +ACTIVE_PROGRAMMERS += asm106x +endif + ifeq ($(CONFIG_ATAHPT), yes) FEATURE_FLAGS += -D'CONFIG_ATAHPT=1' PROGRAMMER_OBJS += atahpt.o diff --git a/asm106x.c b/asm106x.c new file mode 100644 index 0000000..7b54391 --- /dev/null +++ b/asm106x.c @@ -0,0 +1,162 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2023 Alex Badea <vamposdecampos(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdlib.h> +#include "programmer.h" +#include "platform/pci.h" + +#define PCI_VENDOR_ID_ASMEDIA 0x1b21 + +#define ASM106X_REG_DATA 0xf0 +#define ASM106X_REG_CTRL 0xf4 +#define ASM106X_CTRL_RUN 0x20 /* SPI master is running */ +#define ASM106X_CTRL_CSN 0x10 /* CS_n pin output */ +#define ASM106X_CTRL_WRITE 0x08 /* 0=read, 1=write */ +#define ASM106X_CTRL_MASK 0xc0 /* unknown, untouched */ + +struct asm106x_data { + struct pci_dev *pci; +}; + +static const struct dev_entry asm106x_devs[] = { + {PCI_VENDOR_ID_ASMEDIA, 0x0612, OK, "ASMedia", "ASM106x"}, + + {0}, +}; + +static int asm106x_wait_ready(const struct flashctx *flash, uint8_t *pval) +{ + struct asm106x_data *data = flash->mst->spi.data; + unsigned int timeout = 100; + uint8_t val; + + while (timeout) { + val = pci_read_byte(data->pci, ASM106X_REG_CTRL); + msg_pdbg2("asm106x status 0x%02x tries %d\n", val, timeout); + if (!(val & ASM106X_CTRL_RUN)) + break; + programmer_delay(flash, 10); + timeout--; + } + + if (!timeout) { + msg_pdbg("asm106x timed out, ctrl 0x%02x\n", val); + return 1; + } + if (pval) + *pval = val; + return 0; +} + + +static int asm106x_command(const struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + struct asm106x_data *data = flash->mst->spi.data; + uint8_t ctrl; + int rv = 1; + + msg_pdbg2("asm106x command: wr %d rd %d\n", + writecnt, readcnt); + if (asm106x_wait_ready(flash, &ctrl)) + return 1; + ctrl &= ASM106X_CTRL_MASK; + + while (writecnt) { + unsigned int chunk = min(writecnt, 4); + uint32_t val = 0; + + for (int k = chunk-1; k >= 0; k--) + val = (val << 8) | writearr[k]; + msg_pdbg2("asm106x write 0x%08x chunk %u\n", val, chunk); + pci_write_long(data->pci, ASM106X_REG_DATA, val); + pci_write_byte(data->pci, ASM106X_REG_CTRL, + ctrl | ASM106X_CTRL_RUN | ASM106X_CTRL_WRITE | chunk); + if (asm106x_wait_ready(flash, NULL)) + goto out; + writecnt -= chunk; + writearr += chunk; + } + while (readcnt) { + unsigned int chunk = min(readcnt, 4); + uint32_t val; + + pci_write_byte(data->pci, ASM106X_REG_CTRL, + ctrl | ASM106X_CTRL_RUN | chunk); + if (asm106x_wait_ready(flash, NULL)) + goto out; + val = pci_read_long(data->pci, ASM106X_REG_DATA); + msg_pdbg2("asm106x read 0x%08x chunk %u\n", val, chunk); + for (unsigned k = 0; k < chunk; k++) { + readarr[k] = val & 0xff; + val >>= 8; + } + readcnt -= chunk; + readarr += chunk; + } + + rv = 0; +out: + pci_write_byte(data->pci, ASM106X_REG_CTRL, + ctrl | ASM106X_CTRL_CSN); + return rv; +} + +static int asm106x_shutdown(void *data) +{ + free(data); + return 0; +} + +static const struct spi_master asm106x_spi_master = { + .features = SPI_MASTER_4BA, + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, + .command = asm106x_command, + .shutdown = asm106x_shutdown, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, + .probe_opcode = default_spi_probe_opcode, +}; + +static int asm106x_init(const struct programmer_cfg *cfg) +{ + struct pci_dev *pci; + struct asm106x_data *data; + + /* TODO: no BAR required (just config space) */ + pci = pcidev_init(cfg, asm106x_devs, PCI_ROM_ADDRESS); + if (!pci) + return 1; + + data = calloc(1, sizeof(*data)); + if (!data) { + msg_perr("cannot allocate memory for asm106x_data\n"); + return 1; + } + data->pci = pci; + return register_spi_master(&asm106x_spi_master, (void *) data); +} + +const struct programmer_entry programmer_asm106x = { + .name = "asm106x", + .type = PCI, + .devs.dev = asm106x_devs, + .init = asm106x_init, +}; diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 0eabee5..dd4864d 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -433,6 +433,8 @@ .sp .BR "* dirtyjtag_spi" " (for SPI flash ROMs attached to DirtyJTAG-compatible devices)" .sp +.BR "* asm106x" " (for SPI flash ROMs attached to ASM106x PCIe SATA controllers)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER-SPECIFIC INFORMATION @@ -1685,7 +1687,8 @@ needs no access permissions at all. .sp .BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", " -.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise +.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " asm106x ", " +.BR atahpt ", " atavia " and " atapromise have to be run as superuser/root, and need additional raw access permission. .sp .BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi ", " \ diff --git a/include/programmer.h b/include/programmer.h index db32b2c..fe56e82 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -55,6 +55,7 @@ extern const size_t programmer_table_size; /* programmer drivers */ +extern const struct programmer_entry programmer_asm106x; extern const struct programmer_entry programmer_atahpt; extern const struct programmer_entry programmer_atapromise; extern const struct programmer_entry programmer_atavia; diff --git a/meson.build b/meson.build index 2575fe1..ab2cb82 100644 --- a/meson.build +++ b/meson.build @@ -147,6 +147,14 @@ # 'active' : boolean, # added on runtime # } programmer = { + 'asm106x' : { + 'systems' : systems_hwaccess, + 'cpu_families' : cpus_port_io, + 'deps' : [ libpci ], + 'groups' : [ group_pci, group_internal ], + 'srcs' : files('asm106x.c', 'pcidev.c'), + 'flags' : [ '-DCONFIG_ASM106X=1' ], + }, 'atahpt' : { 'systems' : systems_hwaccess, 'cpu_families' : cpus_port_io, diff --git a/programmer_table.c b/programmer_table.c index d58a155..0935167 100644 --- a/programmer_table.c +++ b/programmer_table.c @@ -52,6 +52,10 @@ &programmer_satasii, #endif +#if CONFIG_ASM106X == 1 + &programmer_asm106x, +#endif + #if CONFIG_ATAHPT == 1 &programmer_atahpt, #endif diff --git a/test_build.sh b/test_build.sh index c2f74d2..0e9d704 100755 --- a/test_build.sh +++ b/test_build.sh @@ -10,7 +10,7 @@ PICKIT2_SPI STLINKV3_SPI PARADE_LSPCON MEDIATEK_I2C_SPI REALTEK_MST_I2C_SPI DUMMY \ DRKAISER NICREALTEK NICNATSEMI NICINTEL NICINTEL_SPI NICINTEL_EEPROM OGP_SPI \ BUSPIRATE_SPI DEDIPROG DEVELOPERBOX_SPI SATAMV LINUX_MTD LINUX_SPI IT8212 \ - CH341A_SPI DIGILENT_SPI DIRTYJTAG_SPI JLINK_SPI" + CH341A_SPI DIGILENT_SPI DIRTYJTAG_SPI JLINK_SPI ASM106X" meson_programmer_opts="all auto group_ftdi group_i2c group_jlink group_pci group_serial group_usb \ atahpt atapromise atavia buspirate_spi ch341a_spi dediprog developerbox_spi \ @@ -18,7 +18,7 @@ jlink_spi linux_mtd linux_spi parade_lspcon mediatek_i2c_spi mstarddc_spi \ nic3com nicintel nicintel_eeprom nicintel_spi nicnatsemi nicrealtek \ ogp_spi pickit2_spi pony_spi raiden_debug_spi rayer_spi realtek_mst_i2c_spi \ - satamv satasii serprog stlinkv3_spi usbblaster_spi" + satamv satasii serprog stlinkv3_spi usbblaster_spi asm106x" if [ "$(basename "${CC}")" = "ccc-analyzer" ] || [ -n "${COVERITY_OUTPUT}" ]; then -- To view, visit https://review.coreboot.org/c/flashrom/+/73037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Gerrit-Change-Number: 73037 Gerrit-PatchSet: 1 Gerrit-Owner: Alex Badea <vamposdecampos(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 11: (4 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/bd9695ac_8b26fb87 PS3, Line 38: static struct pci_dev *dev = NULL; > The point I'm trying to make is that the `struct pci_dev *dev` should NOT be a global variable. […] Here is my broken progress: https://gist.githubusercontent.com/CE1CECL/23ce4bab29bb0382da29ad48c049145c… dev is defined at the top because vl805_setregval, and vl805_getregval need it, and those are needed before vl805_getregval. So, I don't know, I think I'm missing something. File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/a4f41350_58416956 PS10, Line 103: static const struct spi_master spi_master_vl805 = { > Add `. […] Done https://review.coreboot.org/c/flashrom/+/72057/comment/b2dfaa79_7e567b67 PS10, Line 120: static int vl805_shutdown(void *data) > This has to move above `struct spi_master` Done https://review.coreboot.org/c/flashrom/+/72057/comment/ad3afa97_f86ae719 PS10, Line 157: register_shutdown(vl805_shutdown, NULL); > The `register_shutdown()` can be removed. […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 11 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 23:49:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#11). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashrom.8.tmpl M include/programmer.h M meson.build M meson_options.txt M programmer_table.c A vl805.c 7 files changed, 216 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/11 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 11 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: Add support for VIA VL805 USB XHCI flashing
by Thomas Heijligen (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB XHCI flashing ...................................................................... Patch Set 10: (4 comments) File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/1d31a212_6432a968 PS3, Line 38: static struct pci_dev *dev = NULL; > Still lost on what you are trying to say, did you mean flashctx instead of flashxtx? […] The point I'm trying to make is that the `struct pci_dev *dev` should NOT be a global variable. It should be contained in a data structure, allocated in `vl85_init()` , used as second parameter in `register_spi_master()` and passed along to `vl805_spi_send_command` via `flash->mst->data`. You may want to look into other programmer calling `register_spi_master()` with the second parameter being not `NULL`. File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/aff042aa_469774a5 PS10, Line 103: static const struct spi_master spi_master_vl805 = { Add `.shutdown = vl805_shutdown,` https://review.coreboot.org/c/flashrom/+/72057/comment/57a6bee0_e9802e09 PS10, Line 120: static int vl805_shutdown(void *data) This has to move above `struct spi_master` https://review.coreboot.org/c/flashrom/+/72057/comment/191ab0ba_73ed70bd PS10, Line 157: register_shutdown(vl805_shutdown, NULL); The `register_shutdown()` can be removed. It is handled as part of the `struct spi_master` -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 10 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 20:41:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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