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[S] Change in flashrom[master]: Add missing Intel B460 flash chip id.
by Paul Menzel (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72056 ) Change subject: Add missing Intel B460 flash chip id. ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/72056/comment/36c600d3_2337d33a PS4, Line 7: Add missing Intel B460 flash chip id. Nit: Please also remove the dot/period at the end [1]. [1]: https://cbea.ms/git-commit/ -- To view, visit https://review.coreboot.org/c/flashrom/+/72056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca Gerrit-Change-Number: 72056 Gerrit-PatchSet: 4 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 17:07:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: Add missing Intel B460 flash chip id.
by Thomas Heijligen (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72056 ) Change subject: Add missing Intel B460 flash chip id. ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca Gerrit-Change-Number: 72056 Gerrit-PatchSet: 4 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 16:23:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by Thomas Heijligen (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 8: (6 comments) Patchset: PS3: > Hello! […] 1. Ok, 2. Yes, thats fine. But I missed one thing. Can you add `vl805` also to `meson_options.txt` under `option('programmer', ...` 3. I'll also have a closer look for the RDID4. This has something to do with how many ID bytes were queried IIRC. I've found also an VL805 PCI card in my pile of stuff and will give your patch a try tomorrow. File flashchips.c: https://review.coreboot.org/c/flashrom/+/72057/comment/224f6d01_f91557c9 PS8, Line 19126: .probe = PROBE_SPI_RDID4, This should also be an other commit. Can be before this or after. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/72057/comment/aa48f95d_248c16bd PS8, Line 1706: and raw memory access pci configutation space is enough. File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/472a7fc5_bb509e79 PS3, Line 38: static struct pci_dev *dev = NULL; > Cannot do that, this part is outside of the global which needs it: […] This was referred to `static struct pci_dev *dev = NULL`, not `dev_entries`. The plan is to have the `pci_dev` handle in a data struct, allocated by `vl805_init()` and passed on via the `flashxtx *ctx->mst->spi.data`. So ``` void vl805_setregval(int reg, uint32_t val) ``` becomes ``` void vl805_setregval(struct pci_dev *dev, int reg, uint32_t val) ``` And `vl805_spi_send_command` gets the pci_dev* like in `pickit2_spi.c:402` https://review.coreboot.org/c/flashrom/+/72057/comment/384dc12a_9d074372 PS3, Line 72: uint32_t indata = 0; : unsigned int curwritecnt = 0; : unsigned int curreadcnt = 0; > I don't understand what you are trying to say, if you remove the highlighted part, it fails to build […] The ` = 0` is not needed for each of them. A declaration of those variables is sufficient. They don't need to be initialized. https://review.coreboot.org/c/flashrom/+/72057/comment/125a2ad4_739206f3 PS3, Line 107: static const struct spi_master spi_master_vl805 = { > I have no clue right now, but I added it in to see if it works later. Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 8 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 16:18:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: Add support for AMD Ryzen flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Arthur Heymans, Nicholas Chin. Hello build bot (Jenkins), Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72058 to look at the new patch set (#4). Change subject: Add support for AMD Ryzen flashing ...................................................................... Add support for AMD Ryzen flashing Tested AMD Ryzen Support on HP Pavilion 590-p0077c, I am able to flash using F.15 or older, but I can downgrade if a newer Firmware is installed using afuwinx64 which is a vendor tool This is due to flashrom SPI lockdown on newer firmwares by HP. It seems HP UEFI Diags uses AFU Flash embedded in. It also comes with a AMD Ryzen 3 2200G with 16MB, so it may not work with chips more that 16MB, it is currently untested by me, since this is the only AMD PC I own. Change-Id: Ife51f7dec31b51a7416e417112b0eedb21fae6a0 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M chipset_enable.c M include/flashchips.h M include/programmer.h M sb600spi.c M spi25.c 5 files changed, 41 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/58/72058/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/72058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ife51f7dec31b51a7416e417112b0eedb21fae6a0 Gerrit-Change-Number: 72058 Gerrit-PatchSet: 4 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#7). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. And I changed W25X10 to RDID4 since it wouldn't work otherwise. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashchips.c M flashrom.8.tmpl M include/programmer.h M meson.build M programmer_table.c A vl805.c 7 files changed, 216 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/7 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 7 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#6). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. And I changed W25X10 to RDID4 since it wouldn't work otherwise. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashrom.8.tmpl M include/programmer.h M meson.build M programmer_table.c A vl805.c 6 files changed, 215 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 6 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[XL] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#5). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. And I changed W25X10 to RDID4 since it wouldn't work otherwise. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashchips.c M flashrom.8.tmpl M include/programmer.h M meson.build M programmer_table.c A vl805.c 7 files changed, 20,929 insertions(+), 20,714 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 5 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[XL] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#4). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able read read, erase, write, verify. Only thing is the WP with the W25X10 gives a untested warning. And I changed W25X10 to RDID4 since it wouldn't work otherwise. Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com> --- M Makefile M flashchips.c M flashrom.8.tmpl M include/programmer.h M meson.build M programmer_table.c A vl805.c 7 files changed, 20,929 insertions(+), 20,714 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 4 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[L] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 3: (15 comments) Patchset: PS3: > Hi Cristopher, […] Hello! 1. I can move the IS25LP080D part that was added in another commit, but since I don't actually have the chip, I cannot test it anyways, so I am just going to remove it, unless someone reports that its needed for another machine. 2. Would something like this work? ... 'srcs' : files('usbblaster_spi.c'), 'flags' : [ '-DCONFIG_USBBLASTER_SPI=1' ], }, 'vl805' : { 'systems' : systems_hwaccess, 'deps' : [ libpci ], 'groups' : [ group_pci, group_internal ], 'srcs' : files('vl805.c', 'pcidev.c'), 'flags' : [ '-DCONFIG_VL805=1' ], }, } active_programmer_count = 0 foreach p_name, p_data : programmer ... 3. This driver is based off of the work from https://github.com/CE1CECL/flashrom-vl805/commit/1448afa15f9a8dddb3e539349e… for flashrom v1.1, which has since been ported to mainline by me. However, the patch set that you found earlier didn't actually work for me on my Raspberry Pi 4 Model B, pretty sure it was just missing the RDID4 thing. What even is RDID4 for anyways? Does SPI_MASTER_4BA solve it? (I'm not home at the moment, will need to test later today). I did actually not keep my logs for my errors but IIRC it said something like it found an unknown chip and it was in unknown state? Either way, the RDID4 fixed it for me at least. I will mark the comments I was able to solve as resolved though since I'm not some, I am only compiling it, making sure it builds. PS3: > Original patch CB:50264 This is the non-working patch I mentioned earlier. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/72057/comment/83326430_52c97c3f PS3, Line 1371: VL806 > Is there a different between VL805 and VL806? This is the only mention of the second chip According to https://www.via-labs.com/product_show.php?id=48 they are the same, but I don't have a vl806, only a vl805, so I removed the vl806 mention in the next patch. File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/21384537_19d4d7e5 PS3, Line 4: * Copyright (C) 2019, 2020 Carl-Daniel Hailfinger > This is your copyright Fixed in next patch. https://review.coreboot.org/c/flashrom/+/72057/comment/96c14bff_0643c450 PS3, Line 27: //#include "hwaccess.h" > Please remove this comment. I wasn't sure what it was for so I commented it out, next patch will remove it. https://review.coreboot.org/c/flashrom/+/72057/comment/3849653b_f6c9019c PS3, Line 28: #include "hwaccess_x86_io.h" > This header is not needed, because the programmer doesn't do anything with I/O ports. […] Fixed in next patch, although it does say the vl805 FW version, it might be part of SPI. https://review.coreboot.org/c/flashrom/+/72057/comment/7531093b_a1821826 PS3, Line 31: extern const struct dev_entry devs_vl805[]; > This is not needed. Fixed in next patch. https://review.coreboot.org/c/flashrom/+/72057/comment/023fa7cf_f7c6f764 PS3, Line 33: const struct dev_entry devs_vl805[] = { > Make this `static`. It is only used in this file. Fixed in next patch, which is coming later sometime today. https://review.coreboot.org/c/flashrom/+/72057/comment/559ce626_75b7849c PS3, Line 38: static struct pci_dev *dev = NULL; > Can you please move this global into a programmer data struct, like it is done on e.g. the it8212. […] Cannot do that, this part is outside of the global which needs it: Sorry, had a hard time formatting, so it will look weird in gerrit. static struct dev_entry devs_vl805[] = { {0x1106, 0x3483, OK, "VIA", "VL805"}, {0}, }; https://review.coreboot.org/c/flashrom/+/72057/comment/59a9cca0_978f7121 PS3, Line 53: /* Some of the registers have unknown purpose and are just used inside the init sequence replay. */ > Can you put these defines below the includes, ontop of all functions? Done, will be in next patch. https://review.coreboot.org/c/flashrom/+/72057/comment/cfd98314_2dda6ba3 PS3, Line 72: uint32_t indata = 0; : unsigned int curwritecnt = 0; : unsigned int curreadcnt = 0; > These variables don't need to be initialized. I don't understand what you are trying to say, if you remove the highlighted part, it fails to build, unless you mean to rework it? https://review.coreboot.org/c/flashrom/+/72057/comment/77242e19_7fd4cf05 PS3, Line 107: static const struct spi_master spi_master_vl805 = { > Can this controller handle SPI flashes with 4-byte addresses? Then you should add `. […] I have no clue right now, but I added it in to see if it works later. https://review.coreboot.org/c/flashrom/+/72057/comment/aa723886_7d0d2e84 PS3, Line 131: int vl805_init(const struct programmer_cfg *cfg); > This prototype is not needed if the function is static. Removed in next patch. https://review.coreboot.org/c/flashrom/+/72057/comment/db7629bf_2c0785cf PS3, Line 133: int vl805_init(const struct programmer_cfg *cfg) > this should be `static` `static int vl805_init(const struct programmer_cfg *cfg)` in next patch https://review.coreboot.org/c/flashrom/+/72057/comment/44753936_ec44152a PS3, Line 137: #if defined(__i386__) || defined(__x86_64__) : if (rget_io_perms()) : return 1; : #endif > This can be removed since the programmer doesn't deal with I/O ports Fixed in next patch -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 3 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 14:56:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[L] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by Thomas Heijligen (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Original patch CB:50264 -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 3 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 11:14:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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