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ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 )
Change subject: Add support for VIA VL805 USB 3 XHCI flashing
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
PS1:
> Please remove the extra newlines in the commit body (everything after the commit summary and before […]
Done
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ChrisEric1 CECL has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72056 )
Change subject: Add missing Intel B460 flash chip id.
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
PS1:
> Please remove the extra newlines in the commit body (everything after the commit summary and before […]
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Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/72966 )
Change subject: cli_classic.c: Drop spurious cast
......................................................................
cli_classic.c: Drop spurious cast
This cast should not be required.
Change-Id: Ia3a658dd6f4986eb6da84a11bce66f53e1571469
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M cli_classic.c
1 file changed, 13 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/72966/1
diff --git a/cli_classic.c b/cli_classic.c
index c72836f..da68919 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -662,8 +662,7 @@
* chip when a flash device gets opened with fd 1 or 2.
*/
if (check_file(stdout) && check_file(stderr)) {
- flashrom_set_log_callback(
- (flashrom_log_callback *)&flashrom_print_cb);
+ flashrom_set_log_callback(&flashrom_print_cb);
}
print_version();
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Hello build bot (Jenkins), Thomas Heijligen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/72057
to look at the new patch set (#2).
Change subject: Add support for VIA VL805 USB 3 XHCI flashing
......................................................................
Add support for VIA VL805 USB 3 XHCI flashing
It works fine for me on my Raspberry Pi 4 Model B. Was able read read,
erase, write, verify. Only thing is the WP with the W25X10 gives a
untested warning. And I changed W25X10 to RDID4 since it wouldn't work
otherwise.
Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38
Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com>
---
M Makefile
M flashchips.c
M flashrom.8.tmpl
M include/programmer.h
M programmer_table.c
A vl805.c
6 files changed, 259 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/72057/2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/72056
to look at the new patch set (#2).
Change subject: Add missing Intel B460 flash chip id.
......................................................................
Add missing Intel B460 flash chip id.
Note that while I can read the chip, on my Lenovo Legion T5 28IMB05,
cannot write to the flash chip with any tools except upgrading with
vendor tool, no downgrades are allowed, due to the fact of SMM, even if
I did manage to flash the BIOS chip somehow, would still face bootguard
since this machine has bootguard. But if I read the chip, and verify my
read bin file, it works fine, until changing the SMBIOS, which is in
the vendor BIOS update package.
Change-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca
Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com>
---
M chipset_enable.c
1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/56/72056/2
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Hello build bot (Jenkins), Arthur Heymans,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: Add support for AMD Ryzen flashing
......................................................................
Add support for AMD Ryzen flashing
Tested AMD Ryzen Support on HP Pavilion 590-p0077c, I am able to flash
using F.15 or older, but I can downgrade if a newer Firmware is
installed using afuwinx64 which is a vendor tool This is due to
flashrom SPI lockdown on newer firmwares by HP. It seems HP UEFI Diags
uses AFU Flash embedded in. It also comes with a AMD Ryzen 3 2200G with
16MB, so it may not work with chips more that 16MB, it is currently
untested by me, since this is the only AMD PC I own.
Change-Id: Ife51f7dec31b51a7416e417112b0eedb21fae6a0
Signed-off-by: Christopher Lentocha <christopherericlentocha(a)gmail.com>
---
M chipset_enable.c
M flashchips.c
M include/flashchips.h
M include/programmer.h
M sb600spi.c
M spi25.c
6 files changed, 127 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/58/72058/2
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Change subject: Add missing Intel B460 flash chip id.
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
PS1:
Please remove the extra newlines in the commit body (everything after the commit summary and before the Change-ID and Signed-off lines). Also, there's no need to add a newline after every comma/period. It's fine to break a sentence in the middle, as long as each line is around 72 characters max.
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Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 )
Change subject: Add support for VIA VL805 USB 3 XHCI flashing
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
PS1:
Please remove the extra newlines in the commit body (everything after the commit summary and before the Change-ID and Signed-off lines). Also, there's no need to add a newline after every comma/period. It's fine to break a sentence in the middle, as long as each line is around 72 characters max.
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Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72058 )
Change subject: Add support for AMD Ryzen flashing
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
PS1:
Please remove the extra newlines in the commit body (everything after the commit summary and before the Change-ID and Signed-off lines). Also, there's no need to add a newline after every comma/period. It's fine to break a sentence in the middle, as long as each line is around 72 characters max.
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/71119 )
Change subject: flashrom.c: Add switch for legacy impl of erasure path
......................................................................
Patch Set 14: Code-Review+2
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