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Change subject: Global cleanup: Fix a few spelling errors
......................................................................
Patch Set 1: Code-Review+2
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Gerrit-Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749
Gerrit-Change-Number: 62840
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth(a)google.com>
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Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/62840 )
Change subject: Global cleanup: Fix a few spelling errors
......................................................................
Global cleanup: Fix a few spelling errors
Just a trivial patch to fix a few errors found by codespell.
Here's the command I used:
codespell -S subprojects,out \
-L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749
---
M Makefile
M ch341a_spi.c
M flash.h
M flashrom.8.tmpl
M flashrom.c
M ft2232_spi.c
M i2c_helper.h
M ich_descriptors.c
M ichspi.c
M lspcon_i2c_spi.c
M ni845x_spi.c
M s25f.c
M stlinkv3_spi.c
M util/flashrom_tester/src/utils.rs
M util/ubertest/ubertest.sh
15 files changed, 26 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/62840/1
diff --git a/Makefile b/Makefile
index f5ed409..b6df57a 100644
--- a/Makefile
+++ b/Makefile
@@ -77,7 +77,7 @@
# Set LC_ALL=C to minimize influences of the locale.
# However, this won't work for the majority of relevant commands because they use the $(shell) function and
-# GNU make does not relay variables exported within the makefile to their evironment.
+# GNU make does not relay variables exported within the makefile to their environment.
LC_ALL=C
export LC_ALL
diff --git a/ch341a_spi.c b/ch341a_spi.c
index bc4112b..3848af9 100644
--- a/ch341a_spi.c
+++ b/ch341a_spi.c
@@ -406,7 +406,7 @@
static const struct spi_master spi_master_ch341a_spi = {
.features = SPI_MASTER_4BA,
- /* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept atleast
+ /* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept at least
* 128 kB. Basically there should be no hard limit because transfers are broken up into USB packets
* sent to the device and most of their payload streamed via SPI. */
.max_data_read = 4 * 1024,
@@ -428,7 +428,7 @@
int32_t ret = libusb_init(NULL);
if (ret < 0) {
- msg_perr("Couldnt initialize libusb!\n");
+ msg_perr("Couldn't initialize libusb!\n");
return -1;
}
diff --git a/flash.h b/flash.h
index f63aa5d..54ec92e 100644
--- a/flash.h
+++ b/flash.h
@@ -71,7 +71,7 @@
/*
* The following enum defines possible write granularities of flash chips. These tend to reflect the properties
- * of the actual hardware not necesserily the write function(s) defined by the respective struct flashchip.
+ * of the actual hardware not necessarily the write function(s) defined by the respective struct flashchip.
* The latter might (and should) be more precisely specified, e.g. they might bail out early if their execution
* would result in undefined chip contents.
*/
@@ -167,7 +167,7 @@
#define TEST_BAD_PREW (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD }
struct flashrom_flashctx;
-#define flashctx flashrom_flashctx /* TODO: Agree on a name and convert all occurences. */
+#define flashctx flashrom_flashctx /* TODO: Agree on a name and convert all occurrences. */
typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
enum flash_reg {
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index fe2d9d6..92eb98f 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -462,7 +462,7 @@
and store it to a medium outside of your computer, like
a USB drive or a network share. If you needed to run the board enable code
already for probing, use it for reading too.
-If reading succeeds and the contens of the read file look legit you can try to write the new image.
+If reading succeeds and the contents of the read file look legit you can try to write the new image.
You should enable the board enable code in any case now, as it
has been written because it is known that writing/erasing without the board
enable is going to fail. In any case (success or failure), please report to
@@ -888,7 +888,7 @@
.sp
The parameter
.B gpiolX=[HLC]
-allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as addtional CS#
+allows use of the GPIOL pins either as generic gpios with a fixed value during flashing or as additional CS#
signal, where
.B X
can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly. The parameter may be specified
diff --git a/flashrom.c b/flashrom.c
index ac61259..7401262 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -624,7 +624,7 @@
return first_len;
}
-/* Returns the number of busses commonly supported by the current programmer and flash chip where the latter
+/* Returns the number of buses commonly supported by the current programmer and flash chip where the latter
* can not be completely accessed due to size/address limits of the programmer. */
unsigned int count_max_decode_exceedings(const struct flashctx *flash)
{
diff --git a/ft2232_spi.c b/ft2232_spi.c
index ccd5f4c..bafed40 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -483,7 +483,7 @@
arg = extract_programmer_param("csgpiol");
if (arg) {
csgpiol_set = true;
- msg_pwarn("Deprecation warning: `csgpiol` is deprectated and will be removed "
+ msg_pwarn("Deprecation warning: `csgpiol` is deprecated and will be removed "
"in the future.\nUse `gpiolX=C` instead.\n");
char *endptr;
diff --git a/i2c_helper.h b/i2c_helper.h
index 709a748..c7d0f7a 100644
--- a/i2c_helper.h
+++ b/i2c_helper.h
@@ -20,7 +20,7 @@
#include <inttypes.h>
/**
- * An convinent structure that contains the buffer size and the buffer
+ * An convenient structure that contains the buffer size and the buffer
* pointer. Used to wrap buffer details while doing the I2C data
* transfer on both input and output. It is the client's responsibility
* to use i2c_buffer_t_fill to initialize this struct instead of
@@ -118,7 +118,7 @@
*
* @fd: file descriptor of the target device.
* @addr: I2C slave address of the target device.
- * @buf_write: data struct includes writting buffer and size.
+ * @buf_write: data struct includes writing buffer and size.
*
* This function does accept empty write and do nothing on such case.
*
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 256224d..77a9ebe 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -970,9 +970,9 @@
uint32_t vscc = umap->vscc_table[i].VSCC;
msg_pdbg2(" JID%d = 0x%08x\n", i, jid);
msg_pdbg2(" VSCC%d = 0x%08x\n", i, vscc);
- msg_pdbg2(" "); /* indention */
+ msg_pdbg2(" "); /* indentation */
prettyprint_rdid(jid);
- msg_pdbg2(" "); /* indention */
+ msg_pdbg2(" "); /* indentation */
prettyprint_ich_reg_vscc(vscc, 0, false);
}
msg_pdbg2("\n");
diff --git a/ichspi.c b/ichspi.c
index 9f45ec2..8b12abb 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -974,7 +974,7 @@
}
/* Program offset in flash into FADDR while preserve the reserved bits
- * and clearing the 25. address bit which is only useable in hwseq. */
+ * and clearing the 25. address bit which is only usable in hwseq. */
temp32 = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF;
REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32);
diff --git a/lspcon_i2c_spi.c b/lspcon_i2c_spi.c
index bed7efc..cabe21f 100644
--- a/lspcon_i2c_spi.c
+++ b/lspcon_i2c_spi.c
@@ -271,7 +271,7 @@
ret |= lspcon_i2c_spi_enable_write_status_register(fd);
ret |= lspcon_i2c_spi_toggle_register_protection(fd, 1);
- /* First byte of writearr shuld be the command value, followed by the value to write.
+ /* First byte of writearr should be the command value, followed by the value to write.
Read length occupies 4 bit and represents 16 level, thus if read 1 byte,
read length should be set 0. */
packet_t packet = {
diff --git a/ni845x_spi.c b/ni845x_spi.c
index 4dcf140..18c0278 100644
--- a/ni845x_spi.c
+++ b/ni845x_spi.c
@@ -146,7 +146,7 @@
/**
* @param serial a null terminated string containing the serial number of the specific device or NULL
- * @return the 0 on successful completition, negative error code on failure
+ * @return the 0 on successful completion, negative error code on failure
*/
static int ni845x_spi_open(const char *serial, uInt32 *return_handle)
{
@@ -161,7 +161,7 @@
tmp = ni845xFindDevice(resource_name, &device_find_handle, &found_devices_count);
if (tmp != 0) {
- // supress warning if no device found
+ // suppress warning if no device found
if (tmp != NI845x_FIND_DEVICE_NO_DEVICE_FOUND)
ni845x_report_error("ni845xFindDevice", tmp);
return -1;
@@ -214,7 +214,7 @@
* @param requested_io_voltage_mV the desired IO voltage in mVolts
* @param set_io_voltage_mV the IO voltage which was set in mVolts
* @param coerce_mode if set to USE_LOWER the closest supported IO voltage which is lower or equal to
- * the requested_io_voltage_mV will be selected. Otherwise the next closest supported voltage will be choosen
+ * the requested_io_voltage_mV will be selected. Otherwise the next closest supported voltage will be chosen
* which is higher or equal to the requested_io_voltage_mV.
* @return 0 on success, negative on error, positive on warning
*/
@@ -340,7 +340,7 @@
tmp = ni845xFindDevice(resource_handle, &device_find_handle, &found_devices_count);
if (tmp != 0) {
- // supress warning if no device found
+ // suppress warning if no device found
if (tmp != NI845x_FIND_DEVICE_NO_DEVICE_FOUND)
ni845x_report_error("ni845xFindDevice", tmp);
return;
@@ -517,7 +517,7 @@
if (read_cnt != 0 && read_arr != NULL) {
if ((read_cnt + write_cnt) != read_size) {
- msg_perr("%s: expected and returned read count mismatch: %u expected, %ld recieved\n",
+ msg_perr("%s: expected and returned read count mismatch: %u expected, %ld received\n",
__func__, read_cnt, read_size);
free(transfer_buffer);
return -1;
diff --git a/s25f.c b/s25f.c
index 0bd4a7c..bb930ef 100644
--- a/s25f.c
+++ b/s25f.c
@@ -17,7 +17,7 @@
/*
* s25f.c - Helper functions for Spansion S25FL and S25FS SPI flash chips.
* Uses 24 bit addressing for the FS chips and 32 bit addressing for the FL
- * chips (which is required by the overlayed sector size devices).
+ * chips (which is required by the overlaid sector size devices).
* TODO: Implement fancy hybrid sector architecture helpers.
*/
@@ -364,7 +364,7 @@
* 04h 00h FS: 256-kB physical sectors
* 04h 01h FS: 64-kB physical sectors
* 04h 00h FL: 256-kB physical sectors
- * 04h 01h FL: Mix of 64-kB and 4KB overlayed sectors
+ * 04h 01h FL: Mix of 64-kB and 4KB overlaid sectors
* 05h 80h FL family
* 05h 81h FS family
*
diff --git a/stlinkv3_spi.c b/stlinkv3_spi.c
index 58e7a41..bbcad47 100644
--- a/stlinkv3_spi.c
+++ b/stlinkv3_spi.c
@@ -411,7 +411,7 @@
&actual_length,
USB_TIMEOUT_IN_MS);
if (rc != LIBUSB_TRANSFER_COMPLETED || (unsigned int)actual_length != read_cnt) {
- msg_perr("Failed to retrive the STLINK_BRIDGE_READ_SPI answer: '%s'\n",
+ msg_perr("Failed to retrieve the STLINK_BRIDGE_READ_SPI answer: '%s'\n",
libusb_error_name(rc));
goto transmit_err;
}
diff --git a/util/flashrom_tester/src/utils.rs b/util/flashrom_tester/src/utils.rs
index d17480b..8d3c319 100644
--- a/util/flashrom_tester/src/utils.rs
+++ b/util/flashrom_tester/src/utils.rs
@@ -88,7 +88,7 @@
}
pub fn toggle_hw_wp(dis: bool) -> Result<(), String> {
- // The easist way to toggle the harware write-protect is
+ // The easist way to toggle the hardware write-protect is
// to {dis}connect the battery (and/or open the WP screw).
let s = if dis { "dis" } else { "" };
info!("Prompt for hardware WP {}able", s);
diff --git a/util/ubertest/ubertest.sh b/util/ubertest/ubertest.sh
index e64daf7..009194d 100755
--- a/util/ubertest/ubertest.sh
+++ b/util/ubertest/ubertest.sh
@@ -312,7 +312,7 @@
# Setup temporary working directories:
# LOCAL_TMPDIR: Working directory on local host.
# REMOTE_TMPDIR: Working directory on remote host.
-# TMPDIR: The temporary directy in which we do most of the work. This is
+# TMPDIR: The temporary directory in which we do most of the work. This is
# convenient for commands that depend on $DO_REMOTE.
LOCAL_TMPDIR=$(mktemp -d --tmpdir flashrom_test.XXXXXXXX)
if [ $? -ne 0 ] ; then
@@ -827,7 +827,7 @@
return $EXIT_SUCCESS
}
-# Before anything else, check to see if Flashrom can succesfully probe
+# Before anything else, check to see if Flashrom can successfully probe
# for and find the flash chips. If not, we will abort.
flashrom_log_scmd $DO_REMOTE "$NEW_FLASHROM $PRIMARY_OPTS" "verify_probe"
if [ $? -ne 0 ]; then
--
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Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: Makefile: build shared pci code as part of the programmer
......................................................................
Makefile: build shared pci code as part of the programmer
Change-Id: I18a54cb0f728a670cc16b67c72e891d26918db19
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M Makefile
1 file changed, 18 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/35/62835/3
--
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Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/62834
to look at the new patch set (#3).
Change subject: NEED_PCI: remove macro
......................................................................
NEED_PCI: remove macro
The NEED_PCI macro is only used to guard prototypes. This is not needed.
Change-Id: I6895b795bc96b3e251700bff4b0054407aac789a
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M Makefile
M meson.build
M programmer.h
3 files changed, 1 insertion(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/62834/3
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to look at the new patch set (#3).
Change subject: print_buildinfo: remove unreachable print of libpci version
......................................................................
print_buildinfo: remove unreachable print of libpci version
The libpci header is neither directly nor indirectly included in
flashrom.c. `PCILIB_VERSION` is therefore never set and the following
print statement is dead code. Since libpci is the only library in
buildinfo, Drop it.
Change-Id: I0b5dbf3bd82a2ffe64b73881383e92f7dad4c382
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M flashrom.c
1 file changed, 0 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/62833/3
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Change subject: Makefile: build shared pci code as part of the programmer
......................................................................
Makefile: build shared pci code as part of the programmer
Change-Id: I18a54cb0f728a670cc16b67c72e891d26918db19
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M Makefile
1 file changed, 18 insertions(+), 18 deletions(-)
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Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/62834
to look at the new patch set (#2).
Change subject: NEED_PCI: remove macro
......................................................................
NEED_PCI: remove macro
The NEED_PCI macro is only used to guard prototypes. This is not needed.
Change-Id: I6895b795bc96b3e251700bff4b0054407aac789a
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M Makefile
M meson.build
M programmer.h
3 files changed, 1 insertion(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/62834/2
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