Attention is currently required from: Alexander Goncharov.
Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/68755 )
Change subject: tests: add probe lifecycle test for ch341a_spi
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
File tests/ch341a_spi.c:
https://review.coreboot.org/c/flashrom/+/68755/comment/20f6cc04_a16e4b06
PS2, Line 26: struct libusb_transfer *transfer_in;
> OK, I've done it. […]
Yes, resolving
File tests/ch341a_spi.c:
https://review.coreboot.org/c/flashrom/+/68755/comment/e8d7d6cc_b94742a6
PS3, Line 26: /* Since the test transfers a data that fits in one CH341 packet, we
: don't need an array of these transfers (as is done in the driver code). */
Please align with code style: https://www.flashrom.org/Development_Guidelines#Coding_style
For the multi-line comment that is
/*
* comment
*/
--
To view, visit https://review.coreboot.org/c/flashrom/+/68755
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I0a2d5591d097435fc69719e1d9bd153433425821
Gerrit-Change-Number: 68755
Gerrit-PatchSet: 3
Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Comment-Date: Fri, 18 Nov 2022 09:15:12 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>
Comment-In-Reply-To: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-MessageType: comment
Attention is currently required from: Felix Singer, Thomas Heijligen, Alexander Goncharov.
Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67664 )
Change subject: tests: add basic lifecycle test for ch341a_spi
......................................................................
Patch Set 9:
(4 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/67664/comment/995b9f45_5dd71834
PS9, Line 8:
If you could add test scenarios in commit message, that would be great. I know you run a few:
1) running test normally -> test pass
2) disabling the programmer ch341_spi -> test skipped, the rest of tests run normally
3) running with no libusb installed -> 3 tests skipped (dediprog, raiden_debug, ch341a), the rest of tests run normally
File tests/ch341a_spi.c:
https://review.coreboot.org/c/flashrom/+/67664/comment/c1ede016_424cdfb4
PS5, Line 22: transfer->status = LIBUSB_TRANSFER_COMPLETED;
: transfer->actual_length = transfer->length;
: transfer->callback(transfer);
> Finally, I've wrote :D
Marking as resolved!
File tests/libusb_wraps.c:
PS5:
> Okay I agree on that. Let's say we are introducing this as a default approach from now on. […]
Looks like you are ready to split the patch?
https://review.coreboot.org/c/flashrom/+/67664/comment/5c146483_33c0e555
PS5, Line 39: /* https://libusb.sourceforge.io/api-1.0/group__libusb__lib.html#ga5f8376b7a86… */
> Alright, thank you! I will just mark this unresolved so that you won't forget to remove links at the […]
I think the time has come, you can remove those
--
To view, visit https://review.coreboot.org/c/flashrom/+/67664
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: If28fbe09ad685082152aa3a7e8d5a150169aee9e
Gerrit-Change-Number: 67664
Gerrit-PatchSet: 9
Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Attention: Thomas Heijligen <src(a)posteo.de>
Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Comment-Date: Fri, 18 Nov 2022 09:05:50 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net>
Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>
Comment-In-Reply-To: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-MessageType: comment
Attention is currently required from: Nikolai Artemiev, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk.
Hello build bot (Jenkins), Nikolai Artemiev, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69750
to look at the new patch set (#2).
Change subject: ichspi: Fix number of bytes for read, write, flash id, erase operation
......................................................................
ichspi: Fix number of bytes for read, write, flash id, erase operation
This patch fixes a potential issue where the SPI controller register
HSFC.FDBC (bits 24-29) value gets incorrectly calculated while passing
the `len` as `0` instead of `1`.
As per Intel EDS, `0b` in the FDBC represents 1 byte while `0x3f`
represents 64-bytes to be transferred. The number of bytes
transferred is the value of this field plus 1.
If we would like to transfer 1 byte then we need to set `0b` in
FDBC for operations like read, write, flash id as to account for
`set byte count` hence, the `len` argument should be `1`.
Additionally, as per EDS, the FDBC field is ignored for any block
erase command.
Note: `FDBC` field still holds the non-zero default value before
any HW seq operation (which might impact the HW seq operations unless
cleared explicitly). An incremental patch on this train will fix
that observation too.
BUG=b:258280679
TEST=Able to build flashrom and perform below operations on Google,
Rex and Google, Kano/Taeko.
Without this patch:
HSFC register value inside ich_start_hwseq_xfer() before initiating
the HW seq operations: 0x3f00
HSFC register value inside ich_start_hwseq_xfer() during the HW seq
operations (--wp-disable): 0x3f11
With this patch:
HSFC register value inside ich_start_hwseq_xfer() before initiating
the HW seq operations: 0x300
HSFC register value inside ich_start_hwseq_xfer() during the HW seq
operations (--wp-disable): 0x311
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: Ie5de7c5bd9809d146a317df56996f7f8a85ca9a5
---
M ichspi.c
1 file changed, 51 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/50/69750/2
--
To view, visit https://review.coreboot.org/c/flashrom/+/69750
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ie5de7c5bd9809d146a317df56996f7f8a85ca9a5
Gerrit-Change-Number: 69750
Gerrit-PatchSet: 2
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Nikolai Artemiev <nartemiev(a)chromium.org>
Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69781
to look at the new patch set (#5).
Change subject: util/pkgbuilds: Add musl PKGBUILDs
......................................................................
util/pkgbuilds: Add musl PKGBUILDs
WIP
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I28f524a53897685ab763c48f8be5370b8f6488b6
---
A util/pkgbuilds/aarch64-linux-musl/PKGBUILD
A util/pkgbuilds/libusb/PKGBUILD
A util/pkgbuilds/riscv64-linux-musl/PKGBUILD
3 files changed, 142 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/69781/5
--
To view, visit https://review.coreboot.org/c/flashrom/+/69781
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I28f524a53897685ab763c48f8be5370b8f6488b6
Gerrit-Change-Number: 69781
Gerrit-PatchSet: 5
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69781
to look at the new patch set (#4).
Change subject: util/pkgbuilds: Add musl PKGBUILDs
......................................................................
util/pkgbuilds: Add musl PKGBUILDs
WIP
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I28f524a53897685ab763c48f8be5370b8f6488b6
---
A util/pkgbuilds/aarch64-linux-musl/PKGBUILD
A util/pkgbuilds/libusb/PKGBUILD
A util/pkgbuilds/riscv64-linux-musl/PKGBUILD
3 files changed, 142 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/69781/4
--
To view, visit https://review.coreboot.org/c/flashrom/+/69781
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I28f524a53897685ab763c48f8be5370b8f6488b6
Gerrit-Change-Number: 69781
Gerrit-PatchSet: 4
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67700 )
(
4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: stlinkv3_spi: work around false-positive compiler error
......................................................................
stlinkv3_spi: work around false-positive compiler error
`stlinkv3_handle` is declared without an initial value. The variable
is initialized in a branch which can only be accessed if
`devs_stlinkv3_spi[0].vendor_id != 0`. Otherwise, the variable contains
a garbage value. We can consider this case as a false positive because
`devs_stlinkv3_spi` holds as a minimum one device entry (otherwise we
wouldn't need a driver).
This issue was found by setting compiler flag `-Og`, which optimizes
debugging experience, and running scan-build. So, we have to work
around it to allow the compiler to use the flag and remove the warning
from the scan-build list.
Change-Id: Ibaf25f67186724d9045ade849026782c3eac4952
Signed-off-by: Alexander Goncharov <chat(a)joursoir.net>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67700
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Thomas Heijligen <src(a)posteo.de>
Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org>
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
---
M stlinkv3_spi.c
1 file changed, 30 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, but someone else must approve
Thomas Heijligen: Looks good to me, approved
Angel Pons: Looks good to me, approved
Anastasia Klimchuk: Looks good to me, approved
diff --git a/stlinkv3_spi.c b/stlinkv3_spi.c
index 9ae3df5..1d5763b 100644
--- a/stlinkv3_spi.c
+++ b/stlinkv3_spi.c
@@ -482,7 +482,8 @@
int ret = 1;
int devIndex = 0;
struct libusb_context *usb_ctx;
- libusb_device_handle *stlinkv3_handle;
+ /* Initialize stlinkv3_handle to NULL for suppressing scan-build false positive core.uninitialized.Branch */
+ libusb_device_handle *stlinkv3_handle = NULL;
struct stlinkv3_spi_data *stlinkv3_data;
if (libusb_init(&usb_ctx)) {
--
To view, visit https://review.coreboot.org/c/flashrom/+/67700
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ibaf25f67186724d9045ade849026782c3eac4952
Gerrit-Change-Number: 67700
Gerrit-PatchSet: 6
Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com>
Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Nico Huber <nico.h(a)gmx.de>
Gerrit-MessageType: merged
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69781
to look at the new patch set (#3).
Change subject: util/pkgbuilds: Add musl PKGBUILDs
......................................................................
util/pkgbuilds: Add musl PKGBUILDs
WIP
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Change-Id: I28f524a53897685ab763c48f8be5370b8f6488b6
---
A util/pkgbuilds/aarch64-linux-musl/PKGBUILD
A util/pkgbuilds/libusb/PKGBUILD
A util/pkgbuilds/riscv64-linux-musl/PKGBUILD
3 files changed, 141 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/69781/3
--
To view, visit https://review.coreboot.org/c/flashrom/+/69781
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I28f524a53897685ab763c48f8be5370b8f6488b6
Gerrit-Change-Number: 69781
Gerrit-PatchSet: 3
Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Felix Singer, Thomas Heijligen, Alexander Goncharov.
Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/68247 )
Change subject: util: add bash completion script
......................................................................
Patch Set 9: Code-Review+1
(1 comment)
Patchset:
PS9:
Nice work thank you!
Thomas, Felix, what do you think?
--
To view, visit https://review.coreboot.org/c/flashrom/+/68247
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ie68bc91c3cea4de2ffdbeffd07e48edd8d5590e1
Gerrit-Change-Number: 68247
Gerrit-PatchSet: 9
Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-CC: Nico Huber <nico.h(a)gmx.de>
Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Attention: Thomas Heijligen <src(a)posteo.de>
Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-Comment-Date: Fri, 18 Nov 2022 07:38:50 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Nico Huber, Sergii Dmytruk.
Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59709 )
Change subject: spi25_statusreg.c: support reading security register
......................................................................
Patch Set 31:
(1 comment)
Patchset:
PS31:
Sergii, would you mind rebasing the remaining chain? I have approved some of the patches later in the chain, if I rebase myself this would make me an uploader and approval would not count. Thanks!
--
To view, visit https://review.coreboot.org/c/flashrom/+/59709
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae
Gerrit-Change-Number: 59709
Gerrit-PatchSet: 31
Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Nico Huber <nico.h(a)gmx.de>
Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Gerrit-Comment-Date: Fri, 18 Nov 2022 07:24:53 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/66836 )
Change subject: writeprotect.c: refuse to work with chip if OTP WPS == 1
......................................................................
writeprotect.c: refuse to work with chip if OTP WPS == 1
Perform the check right in read_wp_bits() as it's used by various WP
operations and also because its results won't make sense if WPS bit is
on and can't be changed.
Change-Id: I143186066a1d3af89809b7135886cb8b0d038085
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66836
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
Reviewed-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M cli_classic.c
M include/libflashrom.h
M writeprotect.c
3 files changed, 41 insertions(+), 3 deletions(-)
Approvals:
build bot (Jenkins): Verified
Edward O'Callaghan: Looks good to me, approved
Nikolai Artemiev: Looks good to me, but someone else must approve
diff --git a/cli_classic.c b/cli_classic.c
index 574afff..bd98a07 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -202,6 +202,8 @@
return "the requested protection range is not supported";
case FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE:
return "could not determine what protection ranges are available";
+ case FLASHROM_WP_ERR_UNSUPPORTED_STATE:
+ return "can't operate on current WP configuration of the chip";
}
return "unknown WP error";
}
diff --git a/include/libflashrom.h b/include/libflashrom.h
index 9bbdcc5..bac76c2 100644
--- a/include/libflashrom.h
+++ b/include/libflashrom.h
@@ -464,7 +464,8 @@
FLASHROM_WP_ERR_VERIFY_FAILED = 5,
FLASHROM_WP_ERR_RANGE_UNSUPPORTED = 6,
FLASHROM_WP_ERR_MODE_UNSUPPORTED = 7,
- FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE = 8
+ FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE = 8,
+ FLASHROM_WP_ERR_UNSUPPORTED_STATE = 9
};
enum flashrom_wp_mode {
diff --git a/writeprotect.c b/writeprotect.c
index 3e8a836..1ac0c1a 100644
--- a/writeprotect.c
+++ b/writeprotect.c
@@ -73,6 +73,25 @@
size_t i;
enum flashrom_wp_result ret;
+ /*
+ * Write protection select bit (WPS) controls kind of write protection
+ * that is used by the chip. When set, BP bits are ignored and each
+ * block/sector has its own WP bit managed by special commands. When
+ * the bit is set and we can't change it, just bail out until
+ * implementation is extended to handle this kind of WP.
+ */
+ if (bit_map->wps.reg != INVALID_REG && bit_map->wps.writability != RW) {
+ bool wps_bit_present;
+ uint8_t wps;
+
+ ret = read_bit(&wps, &wps_bit_present, flash, bit_map->wps);
+ if (ret != FLASHROM_WP_OK)
+ return ret;
+
+ if (wps_bit_present && wps)
+ return FLASHROM_WP_ERR_UNSUPPORTED_STATE;
+ }
+
ret = read_bit(&bits->tb, &bits->tb_bit_present, flash, bit_map->tb);
if (ret != FLASHROM_WP_OK)
return ret;
@@ -93,8 +112,6 @@
if (ret != FLASHROM_WP_OK)
return ret;
- /* Note: WPS bit isn't read here, because it's not part of any range. */
-
for (i = 0; i < ARRAY_SIZE(bits->bp); i++) {
if (bit_map->bp[i].reg == INVALID_REG)
break;
--
To view, visit https://review.coreboot.org/c/flashrom/+/66836
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I143186066a1d3af89809b7135886cb8b0d038085
Gerrit-Change-Number: 66836
Gerrit-PatchSet: 5
Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged