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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: [RFC] writeprotect: add functions to read and write wp_chip_state
......................................................................
[RFC] writeprotect: add functions to read and write wp_chip_state
The functions map between register values and `struct wp_chip_state`
using the chip's register bit map. All currently supported chips can be
handled with a single pair of read/write functions, though an option for
chips to override them might be necessary in the future.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M writeprotect.c
1 file changed, 128 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/58479/7
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58477
to look at the new patch set (#7).
Change subject: [RFC] flashchips: add writeprotect bit layout map to chips
......................................................................
[RFC] flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct flashchip`, with fields for
storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
2 files changed, 71 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/7
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58570
to look at the new patch set (#5).
Change subject: [RFC] spi25_statusreg, flashchips: add SR2 read/write support
......................................................................
[RFC] spi25_statusreg, flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 60 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/5
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58475
to look at the new patch set (#7).
Change subject: [RFC] spi25_statusreg: make register read/write functions generic
......................................................................
[RFC] spi25_statusreg: make register read/write functions generic
This patch adds new spi_{read,write}_register() functions that take the
source/destination register as an argument. Currently they can only
access SR1, support for other registers will be added in another patch.
Since we're refactoring things, this commit also makes
spi_read_register() return an error code, making it possible to identify
error conditions that spi_read_status_register() concealed.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M chipdrivers.h
M flash.h
M spi25_statusreg.c
3 files changed, 83 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/58475/7
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58474
to look at the new patch set (#7).
Change subject: [RFC] writeprotect, cli_classic: delete old writeprotect code
......................................................................
[RFC] writeprotect, cli_classic: delete old writeprotect code
Delete writeprotect code that was previously extracted from the cros tree.
This is the first of a series of commits that adds working writeprotect
support. Following commits will incrementally implement writeprotect
operations, culminating in writeprotect support for a set of example
chips: GD25LQ128, GD25Q32, GD25Q64, GD25Q256, MX25L2006E, and W25X40.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M cli_classic.c
M flash.h
M writeprotect.c
M writeprotect.h
4 files changed, 26 insertions(+), 479 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/58474/7
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58865 )
Change subject: hwaccess.c: move function declarations from programmer.h to hwaccess.h
......................................................................
Patch Set 2:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/58865/comment/ea2f6ee4_6f228350
PS2, Line 37: #include "programmer.h"
> This was never needed since ich_descriptors.h also include programmer.h […]
Ah, right. Then it's just fine to have it here. We don't want to rely on
an indirect include.
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Change subject: hwaccess.c: move function declarations from programmer.h to hwaccess.h
......................................................................
Patch Set 2:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/58865/comment/bac41935_1f044310
PS2, Line 37: #include "programmer.h"
> Still needed?
This was never needed since ich_descriptors.h also include programmer.h
programmer.h is needed for enum ich_chipset
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/55578 )
Change subject: Add Tiger Lake U Premium support
......................................................................
Patch Set 13:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/55578/comment/8ae227ef_04a939a4
PS13, Line 1016: if (content->CSSL != 0x11)
AIUI, David's wants an explicit check+return for each platform. So this should become
something like
if (...)
return TIGER_POINT;
warn;
return TIGER_POINT;
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