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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/55715 )
Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
Patch Set 22:
(1 comment)
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/87db202f_5479b0cc
PS20, Line 332: if (blocks_1_2) {
: itestring->flags.clock_source = CLOCK_SOURCE_INTERNAL;
:
> The question is if we remove it will not break things?
Maybe, maybe not :S Let's keep it for now but add a comment
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Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
Patch Set 21:
(6 comments)
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/fa9d95ba_76180c87
PS17, Line 835:
: if (register_shutdown(ite_ecfw_shutdown, ctx_data))
: goto ite_ecfw_init_exit;
:
> > Or do we know any other way of getting out of flashing mode of the EC? […]
Done
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/241321b5_6a0d5538
PS20, Line 87: crc_check
> this bit is inverted (1 = disable); change the name to `no_crc_check`? […]
Done
https://review.coreboot.org/c/flashrom/+/55715/comment/d7a907de_cb2a0681
PS20, Line 87: enables
> disables
Done
https://review.coreboot.org/c/flashrom/+/55715/comment/49a73010_46f02acd
PS20, Line 91: fspi_mirror
> this bit is negated (1 = disable), change the name to `no_fspi_mirror`? […]
Done
https://review.coreboot.org/c/flashrom/+/55715/comment/0c58f278_fd1cc552
PS20, Line 93: pwm_blinking
> this bit is negated (1 = disable); change the name to `no_pwm_blinking`? […]
Done
https://review.coreboot.org/c/flashrom/+/55715/comment/58ca6021_ad215108
PS20, Line 332: if (blocks_1_2) {
: itestring->flags.clock_source = CLOCK_SOURCE_INTERNAL;
:
> hm, I know the reference implementation does that... […]
The question is if we remove it will not break things?
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Attention is currently required from: Felix Singer, Nico Huber, Michał Żygowski, Paul Menzel, Sergii Dmytruk.
Hello Felix Singer, build bot (Jenkins), Nico Huber, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/55715
to look at the new patch set (#22).
Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
Add a new programmer supporting ITE Embedded Controllers found on
TUXEDO laptops. Tested on TUXEDO InfinityBook S 14 Gen6 and 15 Gen6
with EC firmware updates from IBV, EC versions 1.07.02TR1 and
1.07.04TR4.
Example standard command to update EC firmware on a TUXEDO laptop:
"flashrom -p ite_ec:romsize=128K,autoload=disable -w eL14MU02.TR1"
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Change-Id: I0e42260155ffea38a6f60790871cd8da7b657031
---
M Makefile
M flashrom.8.tmpl
M it87spi.c
A ite_ecfw.c
A ite_ecfw.h
M meson.build
M meson_options.txt
M programmer.h
M programmer_table.c
9 files changed, 1,125 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/15/55715/22
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Hello build bot (Jenkins), Nico Huber, Thomas Heijligen,
I'd like you to reexamine a change. Please visit
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Change subject: pcidev: Move pci device functions out of internal programmer
......................................................................
pcidev: Move pci device functions out of internal programmer
PCI device helper functions implemented in internal programmer are
generic, not specific to this particular programmer. Move them to
the common pcidev.c file which is included in all programmers
requiring PCI and may be used not only for internal programmer.
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: Ice40783a05c01cc78b34eb2c4a575554e9d55f8e
---
M internal.c
M pcidev.c
2 files changed, 58 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/55848/8
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Hello Tim Crawford, build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#13).
Change subject: Add Tiger Lake U Premium support
......................................................................
Add Tiger Lake U Premium support
Tiger Lake has very low ICCRIBA (TGL=0x11, CNL=0x34 and CML=0x34) and
detects as unknown chipset compatible with 300 series chipset. Add a
new enum CHIPSET_500_SERIES_TIGER_POINT and treat it identically to
CHIPSET_400_SERIES_COMET_POINT. There are some exceptions though,
ICCRIBA is no longer present n descriptor content so a new union has
been defined for new fields and used in descriptor guessing.
freq_read field is not present on Tiger Lake, moreover in CannonPoint
and Comet Point this field is used as eSPI/EC frequency, so a new
function to print read frequency has ben added. Finally Tiger lake
boot straps include eSPI, so a new bus has been added for the new
straps.
TEST=Flash BIOS region on Intel i5-1135G7
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: I28f3b6fe9f8ce9e976a6808683f46b6f4ec72bdd
---
M chipset_enable.c
M ich_descriptors.c
M ich_descriptors.h
M ichspi.c
M programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
6 files changed, 91 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/55578/13
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58479 )
Change subject: [RFC] writeprotect: add functions to read and write wp_chip_state
......................................................................
Patch Set 6:
(1 comment)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/58479/comment/c45011bd_68c6514c
PS6, Line 73: void *suppress_unused_warning_for_read_wp_chip_state = read_wp_chip_state;
> Maybe I am missing something, but I don't see this is being used in the patch? […]
This merely avoids a warning about the `read_wp_chip_state()` function being unused. I agree that this function should be introduced in the same commit it gets used.
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Change subject: [RFC] flashchips, writeprotect_ranges: add range decoding function
......................................................................
Patch Set 7:
(2 comments)
File writeprotect_ranges.c:
https://review.coreboot.org/c/flashrom/+/58480/comment/635fd48f_124aca23
PS7, Line 20: TODO
Need new line before TODO.
https://review.coreboot.org/c/flashrom/+/58480/comment/bb85378b_44c8d5b6
PS7, Line 91:
Probably can remove empty line at the end? (line 91)
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Change subject: [RFC] writeprotect: add functions to read and write wp_chip_state
......................................................................
Patch Set 6:
(4 comments)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/58479/comment/f55f298e_5cd01830
PS6, Line 26: print_wp_chip_state
You can move print_wp_chip_state here on the top, and avoid forward declaration.
https://review.coreboot.org/c/flashrom/+/58479/comment/46fa91f2_1764679d
PS6, Line 28: static int read_reg_bit(
: const struct flashctx *flash,
: const struct reg_bit_info bit,
: uint8_t *value,
: bool *present)
Just to check: does this not fit into 112 chars? It really helps to grep when all parameters are on one line.
112 chars is a lot, most of the code does not need that much. But for the list of function parameters, it makes grep more informative, and that's very useful.
You are declaring lots of new functions in this patch series, the comment applies to all of them.
https://review.coreboot.org/c/flashrom/+/58479/comment/359208e4_436b8f9a
PS6, Line 73: void *suppress_unused_warning_for_read_wp_chip_state = read_wp_chip_state;
Maybe I am missing something, but I don't see this is being used in the patch?
If you use it later in the chain, better to introduce it when it's used.
And anyway I will ask you: does it have to be a global state?
https://review.coreboot.org/c/flashrom/+/58479/comment/2cd04490_927c1b0c
PS6, Line 141: void *suppress_unused_warning_for_write_wp_chip_state = write_wp_chip_state;
Same comment as previous
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Change subject: [RFC] flashchips: add writeprotect bit layout map to chips
......................................................................
Patch Set 6:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/72d01a4d_282c0639
PS6, Line 6902:
I know it's minor, but there is an empty line between chip definitions, maybe return it back?
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Change subject: [RFC] spi25_statusreg, flashchips: add SR2 read/write support
......................................................................
Patch Set 4:
(1 comment)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58570/comment/de2920cf_b8ef858c
PS4, Line 145: Cannot read register
Maybe we can add into error message, which register is not supported?
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