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Change subject: [RFC] flashchips: add writeprotect bit layout map to chips
......................................................................
Patch Set 7:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/7df246c8_7891c80c
PS6, Line 6902:
> I know it's minor, but there is an empty line between chip definitions, maybe return it back?
Done
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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58475 )
Change subject: [RFC] spi25_statusreg: make register read/write functions generic
......................................................................
Patch Set 7:
(2 comments)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58475/comment/2d100b30_e2c5798c
PS6, Line 2: This file
> Meta-question: does the name of the file "spi25_statusreg. […]
You're right, it should probably be renamed at some point. But it still contains status register specific functions so it's probably best to leave it for now.
https://review.coreboot.org/c/flashrom/+/58475/comment/3581c498_8f9a4036
PS6, Line 32: WRSR
> WRSR is not hard-coded anymore in the second command below (as I understand), is this comment still […]
Done
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Change subject: [RFC] writeprotect, cli_classic: delete old writeprotect code
......................................................................
Patch Set 7:
(6 comments)
File cli_classic.c:
https://review.coreboot.org/c/flashrom/+/58474/comment/f6d4906d_42d2dd36
PS6, Line 700: complete
> until support is fully implemented?
Done
https://review.coreboot.org/c/flashrom/+/58474/comment/8a5ac1dd_b27ef08f
PS6, Line 702: write protect is not supported on this flash chip
> is it not supported on this flash chip, or not supported in flashrom?
Most but not all chips support write protection, so usually it would be a lack of support in flashrom. I've changed the message a bit.
https://review.coreboot.org/c/flashrom/+/58474/comment/97fd6e4b_e469686e
PS6, Line 762: (void) wp_mode_opt;
: (void) wp_region;
> sorry maybe that's a silly question, but what these two lines are doing?
It's just for avoiding compiler warnings, I've added a comment.
File writeprotect.h:
https://review.coreboot.org/c/flashrom/+/58474/comment/1f2c1b84_a2bc8cb6
PS6, Line 24: WP_MODE_DISABLED,
: WP_MODE_HARDWARE,
: WP_MODE_POWER_CYCLE,
: WP_MODE_PERMANENT,
> Is there a reason the comments on enum values have been removed?
I'm not sure how much they explain what the modes actually do, but I've added them back for now.
File writeprotect.h:
https://review.coreboot.org/c/flashrom/+/58474/comment/72ee23b4_c3589d9a
PS3, Line 31: uint32_t
> Done - through flash.h. I can add explicit #includes for stdint.h and stdbool.h too though.
Marking resolved
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/58474/comment/b8d7aa22_6d1c8f8d
PS6, Line 18: #include <stdio.h>
: #include <stdlib.h>
: #include <string.h>
:
: #include "flash.h"
: #include "chipdrivers.h"
> Technically, these includes are not needed (since the code has been removed)?
We could get rid of them but they're not really doing any harm. And if I remove them now I'll probably mess up and forget to add them back in the right patches :)
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58483
to look at the new patch set (#7).
Change subject: [RFC] writeprotect: implement wp_get_mode() and wp_set_mode()
......................................................................
[RFC] writeprotect: implement wp_get_mode() and wp_set_mode()
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,status}
BRANCH=none
Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M cli_classic.c
M writeprotect.c
M writeprotect.h
3 files changed, 129 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/83/58483/7
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58480
to look at the new patch set (#8).
Change subject: [RFC] flashchips, writeprotect_ranges: add range decoding function
......................................................................
[RFC] flashchips, writeprotect_ranges: add range decoding function
Allow chips to specify functions that map status register bits to
protection ranges. These are used to enumerate available ranges and
determine the protection state of chips. The patch also adds a range
decoding function for the example chips. Many other chips can also be
handled by it, though some will require different functions (e.g.
MX25L6406 and related chips).
Another approach that has been tried in cros flashrom is maintaining
tables of range data, but it quickly becomes error prone and hard to
validate.
Using a function to interpret the ranges allows compact encoding with
most chips and is flexible enough to allow chips with less predictable
ranges to be handled as well.
BUG=b:195381327,b:153800563
TEST=dumped range tables, checked against datasheets
BRANCH=none
Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M Makefile
M chipdrivers.h
M flash.h
M flashchips.c
M meson.build
A writeprotect_ranges.c
6 files changed, 111 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/58480/8
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58479
to look at the new patch set (#7).
Change subject: [RFC] writeprotect: add functions to read and write wp_chip_state
......................................................................
[RFC] writeprotect: add functions to read and write wp_chip_state
The functions map between register values and `struct wp_chip_state`
using the chip's register bit map. All currently supported chips can be
handled with a single pair of read/write functions, though an option for
chips to override them might be necessary in the future.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M writeprotect.c
1 file changed, 128 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/58479/7
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58477
to look at the new patch set (#7).
Change subject: [RFC] flashchips: add writeprotect bit layout map to chips
......................................................................
[RFC] flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct flashchip`, with fields for
storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
2 files changed, 71 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/7
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
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Change subject: [RFC] spi25_statusreg, flashchips: add SR2 read/write support
......................................................................
[RFC] spi25_statusreg, flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 60 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/5
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