Attention is currently required from: Xiang Wang, Stefan Reinauer, Angel Pons.
Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/49255
to look at the new patch set (#10).
Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
bitbang-spi.c: support clock polarity and phase
SPI has four modes, which are determined by Clock polarity and Clock phase.
See https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Clock_polarity_an…
for details. The previous code only supports one mode and may not be able to
handle some special spi flash.
TEST=build and run flashrom with sysfsgpio on raspberrypi to read W25Q128.V
Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d
Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org>
---
M bitbang_spi.c
1 file changed, 70 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/49255/10
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49262 )
Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 3: Code-Review+1
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/49262/comment/9bb8064c_55e64011
PS3, Line 7: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
haha, again while it's a obvious patch for the author please do put some detail in the commit msg body as it helps the wider community understand it and learn from it.
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Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
Patch Set 9:
(1 comment)
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/640d25f4_ac728af9
PS9, Line 140:
maybe put this style change into https://review.coreboot.org/c/flashrom/+/49262 and have /49262 come before this patch /49255 to make things more easily revertible should there be issue.
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Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
Patch Set 9: Code-Review+2
(1 comment)
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/5be6ee78_216e483d
PS9, Line 77: }
sorry, I mean the `\n` deletion after the closing '}' is spurious here.
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Change subject: sysfsgpio.c implement spi interface via linux sysfs
......................................................................
Patch Set 4: Code-Review+2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/49262
to look at the new patch set (#3).
Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
Change-Id: Icf8b65aed20244ccffc231da2c599c6ca1796104
Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org>
---
M bitbang_spi.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/49262/3
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Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons.
Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/49255
to look at the new patch set (#9).
Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
bitbang-spi.c: support clock polarity and phase
SPI has four modes, which are determined by Clock polarity and Clock phase.
See https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Clock_polarity_an…
for details. The previous code only supports one mode and may not be able to
handle some special spi flash.
TEST=build and run flashrom with sysfsgpio on raspberrypi to read W25Q128.V
Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d
Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org>
---
M bitbang_spi.c
1 file changed, 71 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/49255/9
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Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/49255
to look at the new patch set (#8).
Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
bitbang-spi.c: support clock polarity and phase
SPI has four modes, which are determined by Clock polarity and Clock phase.
See https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Clock_polarity_an…
for details. The previous code only supports one mode and may not be able to
handle some special spi flash.
TEST=build and run flashrom with sysfsgpio on raspberrypi to read W25Q128.V
Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d
Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org>
---
M bitbang_spi.c
1 file changed, 71 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/49255/8
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Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49254 )
Change subject: sysfsgpio.c implement spi interface via linux sysfs
......................................................................
Patch Set 4:
(1 comment)
File sysfsgpio.c:
https://review.coreboot.org/c/flashrom/+/49254/comment/f4c6918e_20f7424a
PS1, Line 209: /* parameter format: pins=cs_pin:sck_pin:mosi_pin:miso_pin */
: char *pins = extract_programmer_param("pins");
: int pins_inited = 0;
: do {
: struct pin_desc *pins_tab[] = {
: &pin_cs, &pin_sck, &pin_mosi, &pin_miso
: };
: if (!(pins && strlen(pins)))
: break;
: char *token = strtok(pins, ":");
: for (unsigned i = 0; i < ARRAY_SIZE(pins_tab); i++) {
: long v;
: if (!token)
: break;
: if (atoi_s(token, 1, &v))
: break;
: pins_tab[i]->pin = v;
: if (export_sysfsgpio(pins_tab[i]))
: break;
: token = strtok(NULL, ":");
: pins_inited = (i + 1 == ARRAY_SIZE(pins_tab));
: }
: } while (0);
: if (pins)
: free(pins);
: if (!pins_inited)
: return 1;
> It looks much better now but I think we can make one more step forwards to keeping more of the funct […]
Done
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