January 2021 - flashrom-gerrit

Change in flashrom[master]: sysfsgpio.c implement spi interface via linux sysfs
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons. Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49254 ) Change subject: sysfsgpio.c implement spi interface via linux sysfs ...................................................................... Patch Set 4: (7 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/49254/comment/3ac20de4_10e217b2 PS1, Line 10: some SBC > Include this information in your commit message on a `TEST=` line perhaps? Done File sysfsgpio.c: https://review.coreboot.org/c/flashrom/+/49254/comment/d722c5d8_51c4baf8 PS3, Line 46: pins > `g_pins` Done https://review.coreboot.org/c/flashrom/+/49254/comment/41f89a75_323857ba PS3, Line 157: p > g_ Done https://review.coreboot.org/c/flashrom/+/49254/comment/cd245d89_dee19e01 PS3, Line 184: p > g_ Done https://review.coreboot.org/c/flashrom/+/49254/comment/6cad12d2_16933f0d PS3, Line 204: static int parse_pins(void) > `static int parse_pins(struct sysfsgpio_pins *pins)` Done https://review.coreboot.org/c/flashrom/+/49254/comment/178ab6d8_8357ae91 PS3, Line 241: ) > `parse_pins(&g_pins)` Done https://review.coreboot.org/c/flashrom/+/49254/comment/bddb9980_6654f0fc PS3, Line 244: p > g_ Done -- To view, visit https://review.coreboot.org/c/flashrom/+/49254 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1bc47ef8011bba560326b501a80869340bb9f733 Gerrit-Change-Number: 49254 Gerrit-PatchSet: 4 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Jan 2021 03:47:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Xiang Wang <merle(a)hardenedlinux.org> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: bitbang-spi.c: support clock polarity and phase
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons. Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 ) Change subject: bitbang-spi.c: support clock polarity and phase ...................................................................... Patch Set 7: (9 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/49255/comment/4bcc8490_9031c6be PS1, Line 8: > Hi Xiang, So I think what Angel and I are saying here is that the rational should be explained in mo […] Sorry I misunderstood. File bitbang_spi.c: https://review.coreboot.org/c/flashrom/+/49255/comment/b3eba98a_c24212aa PS6, Line 52: } : : master->set_sck(sck); : master->set_mosi(mosi); : } > spurious changes? This is the spi timing requirement, the mosi change should be before the sck change when sending data https://review.coreboot.org/c/flashrom/+/49255/comment/cd6f1a5e_6c580f5d PS6, Line 62: > ditto Done https://review.coreboot.org/c/flashrom/+/49255/comment/679cf963_1ffa11b2 PS6, Line 89: for (int i = 0; i < 8; i++) { > Leave style changes to another commit and out of the meat of this one, it gets in the way of reviewi […] Done https://review.coreboot.org/c/flashrom/+/49255/comment/e4f09580_9aea642e PS6, Line 90: ret = ret << 1; > same here, just leave as `ret <<= 1;` in this commit Done https://review.coreboot.org/c/flashrom/+/49255/comment/5e82946b_2f1959f2 PS6, Line 107: for (int i = 0; i < 8; i++) { > ditto Done https://review.coreboot.org/c/flashrom/+/49255/comment/b25fe90f_74e596fd PS6, Line 119: val = val << 1; > ditto Done https://review.coreboot.org/c/flashrom/+/49255/comment/d19d7b79_d46dc670 PS6, Line 136: programmer_delay(master->half_period); : bitbang_spi_set_cs(master, 0); : programmer_delay(master->half_period); : > this feels like its own little patch. move to https://review.coreboot.org/c/flashrom/+/49262 https://review.coreboot.org/c/flashrom/+/49255/comment/b6c1dbdb_314857fb PS6, Line 186: char *mode = extract_programmer_param("mode"); : if (mode) { : if (strlen(mode)) { : char *endptr; : int v = strtol(mode, &endptr, 0); : if (mode == endptr || v > 3 || v < 0) { : msg_perr("bitbang spi only work with mode 0-3\n"); : free(mode); : return ERROR_FLASHROM_BUG; : } : cpol = (v >> 1) & 1; : cpha = (v >> 0) & 1; : } : free(mode); : } > static parse_mode function that takes `(&int, &int)` as a type ? Done -- To view, visit https://review.coreboot.org/c/flashrom/+/49255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Gerrit-Change-Number: 49255 Gerrit-PatchSet: 7 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Jan 2021 03:44:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Xiang Wang <merle(a)hardenedlinux.org> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: bitbang_spi.c: Fix bitbang_spi_send_command to make the delay symmetric
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/49262 ) Change subject: bitbang_spi.c: Fix bitbang_spi_send_command to make the delay symmetric ...................................................................... bitbang_spi.c: Fix bitbang_spi_send_command to make the delay symmetric Change-Id: Icf8b65aed20244ccffc231da2c599c6ca1796104 Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org> --- M bitbang_spi.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/49262/1 diff --git a/bitbang_spi.c b/bitbang_spi.c index 021b977..82e55ee 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -136,7 +136,9 @@ * programmer to use its own SPI engine for native accesses. */ bitbang_spi_request_bus(master); + programmer_delay(master->half_period); bitbang_spi_set_cs(master, 0); + programmer_delay(master->half_period); for (i = 0; i < writecnt; i++) bitbang_spi_write_byte(master, writearr[i]); -- To view, visit https://review.coreboot.org/c/flashrom/+/49262 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Icf8b65aed20244ccffc231da2c599c6ca1796104 Gerrit-Change-Number: 49262 Gerrit-PatchSet: 1 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: bitbang-spi.c: support clock polarity and phase
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Xiang Wang, Stefan Reinauer, Angel Pons. Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/49255 to look at the new patch set (#7). Change subject: bitbang-spi.c: support clock polarity and phase ...................................................................... bitbang-spi.c: support clock polarity and phase SPI has four modes, which are determined by Clock polarity and Clock phase. See https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Clock_polarity_an… for details. The previous code only supports one mode and may not be able to handle some special spi flash. TEST=build and run flashrom with sysfsgpio on raspberrypi to read W25Q128.V Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org> --- M bitbang_spi.c 1 file changed, 71 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/49255/7 -- To view, visit https://review.coreboot.org/c/flashrom/+/49255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Gerrit-Change-Number: 49255 Gerrit-PatchSet: 7 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: sysfsgpio.c implement spi interface via linux sysfs
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Xiang Wang, Stefan Reinauer, Angel Pons. Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/49254 to look at the new patch set (#4). Change subject: sysfsgpio.c implement spi interface via linux sysfs ...................................................................... sysfsgpio.c implement spi interface via linux sysfs Linux can operate gpio through sysfs, this patch implements a bitbang spi interface through sysfs. Through this patch, some SBC can be used as flash programmers. TEST=build and run flashrom with sysfsgpio on raspberrypi to read W25Q128.V Change-Id: I1bc47ef8011bba560326b501a80869340bb9f733 Signed-off-by: Xiang Wang <merle(a)hardenedliux.org> --- M Makefile M flashrom.c M meson.build M meson_options.txt M programmer.h A sysfsgpio.c 6 files changed, 291 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/49254/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/49254 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1bc47ef8011bba560326b501a80869340bb9f733 Gerrit-Change-Number: 49254 Gerrit-PatchSet: 4 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: bitbang-spi.c: support clock polarity and phase
by Edward O'Callaghan (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Xiang Wang, Stefan Reinauer, Angel Pons. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 ) Change subject: bitbang-spi.c: support clock polarity and phase ...................................................................... Patch Set 6: (9 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/49255/comment/c31b8225_907bab5e PS1, Line 8: > https://en.wikipedia.org/wiki/Serial_Peripheral_Interface […] Hi Xiang, So I think what Angel and I are saying here is that the rational should be explained in more detail in the commit message for such a substantial change in behavior. Please take your time here to detail more precisely what you have in mind to help bridge the gap in what you are trying to archive vs the communities understanding of the current code. File bitbang_spi.c: https://review.coreboot.org/c/flashrom/+/49255/comment/7203c5fd_ce5fc956 PS6, Line 52: } : : master->set_sck(sck); : master->set_mosi(mosi); : } spurious changes? https://review.coreboot.org/c/flashrom/+/49255/comment/0ff3ed08_74429927 PS6, Line 62: ditto https://review.coreboot.org/c/flashrom/+/49255/comment/cf93e2aa_90e23082 PS6, Line 89: for (int i = 0; i < 8; i++) { Leave style changes to another commit and out of the meat of this one, it gets in the way of reviewing the more important details. https://review.coreboot.org/c/flashrom/+/49255/comment/07bf21e9_27cb0d96 PS6, Line 90: ret = ret << 1; same here, just leave as `ret <<= 1;` in this commit https://review.coreboot.org/c/flashrom/+/49255/comment/dfcab703_529f5e47 PS6, Line 107: for (int i = 0; i < 8; i++) { ditto https://review.coreboot.org/c/flashrom/+/49255/comment/8f86772f_27328871 PS6, Line 119: val = val << 1; ditto https://review.coreboot.org/c/flashrom/+/49255/comment/0d844a84_f607a509 PS6, Line 136: programmer_delay(master->half_period); : bitbang_spi_set_cs(master, 0); : programmer_delay(master->half_period); : this feels like its own little patch. https://review.coreboot.org/c/flashrom/+/49255/comment/cb9f26fe_88e2c7cb PS6, Line 186: char *mode = extract_programmer_param("mode"); : if (mode) { : if (strlen(mode)) { : char *endptr; : int v = strtol(mode, &endptr, 0); : if (mode == endptr || v > 3 || v < 0) { : msg_perr("bitbang spi only work with mode 0-3\n"); : free(mode); : return ERROR_FLASHROM_BUG; : } : cpol = (v >> 1) & 1; : cpha = (v >> 0) & 1; : } : free(mode); : } static parse_mode function that takes `(&int, &int)` as a type ? -- To view, visit https://review.coreboot.org/c/flashrom/+/49255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Gerrit-Change-Number: 49255 Gerrit-PatchSet: 6 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Jan 2021 02:48:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Xiang Wang <merle(a)hardenedlinux.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: sysfsgpio.c implement spi interface via linux sysfs
by Edward O'Callaghan (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Xiang Wang, Stefan Reinauer, Angel Pons. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49254 ) Change subject: sysfsgpio.c implement spi interface via linux sysfs ...................................................................... Patch Set 3: Code-Review+1 (8 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/49254/comment/b1bf05f4_eecf71e5 PS1, Line 10: some SBC > raspberry pi zero w […] Include this information in your commit message on a `TEST=` line perhaps? File sysfsgpio.c: https://review.coreboot.org/c/flashrom/+/49254/comment/64e2fd6f_d37487a4 PS1, Line 209: /* parameter format: pins=cs_pin:sck_pin:mosi_pin:miso_pin */ : char *pins = extract_programmer_param("pins"); : int pins_inited = 0; : do { : struct pin_desc *pins_tab[] = { : &pin_cs, &pin_sck, &pin_mosi, &pin_miso : }; : if (!(pins && strlen(pins))) : break; : char *token = strtok(pins, ":"); : for (unsigned i = 0; i < ARRAY_SIZE(pins_tab); i++) { : long v; : if (!token) : break; : if (atoi_s(token, 1, &v)) : break; : pins_tab[i]->pin = v; : if (export_sysfsgpio(pins_tab[i])) : break; : token = strtok(NULL, ":"); : pins_inited = (i + 1 == ARRAY_SIZE(pins_tab)); : } : } while (0); : if (pins) : free(pins); : if (!pins_inited) : return 1; > The pin information can be extracted into the global variable pins. […] It looks much better now but I think we can make one more step forwards to keeping more of the functions pure. This helps for unit-tests (which would be ideal if you can add some) but generally helps box down the global state accesses to a limited number of places. File sysfsgpio.c: https://review.coreboot.org/c/flashrom/+/49254/comment/29214bde_4d9ed98b PS3, Line 46: pins `g_pins` https://review.coreboot.org/c/flashrom/+/49254/comment/583cc17f_e72d7d72 PS3, Line 157: p g_ https://review.coreboot.org/c/flashrom/+/49254/comment/2eadaeba_b4fe35ec PS3, Line 184: p g_ https://review.coreboot.org/c/flashrom/+/49254/comment/4ba00f2b_b2d68c0e PS3, Line 204: static int parse_pins(void) `static int parse_pins(struct sysfsgpio_pins *pins)` https://review.coreboot.org/c/flashrom/+/49254/comment/7f0451ef_2cd72254 PS3, Line 241: ) `parse_pins(&g_pins)` https://review.coreboot.org/c/flashrom/+/49254/comment/cd11f93e_955efa76 PS3, Line 244: p g_ -- To view, visit https://review.coreboot.org/c/flashrom/+/49254 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1bc47ef8011bba560326b501a80869340bb9f733 Gerrit-Change-Number: 49254 Gerrit-PatchSet: 3 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Jan 2021 02:35:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Xiang Wang <merle(a)hardenedlinux.org> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: programmer.h: remove unused interfaces of bitbang_spi_master
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Xiang Wang has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/49256 ) Change subject: programmer.h: remove unused interfaces of bitbang_spi_master ...................................................................... Abandoned Keep set_sck_set_mosi/set_sck_get_mosi for speed -- To view, visit https://review.coreboot.org/c/flashrom/+/49256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I68e5fc39cf831e3b7d98a6e4797b36584c6082e8 Gerrit-Change-Number: 49256 Gerrit-PatchSet: 7 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-MessageType: abandon

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Change in flashrom[master]: bitbang-spi.c: support clock polarity and phase
by Xiang Wang (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons. Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/49255 to look at the new patch set (#6). Change subject: bitbang-spi.c: support clock polarity and phase ...................................................................... bitbang-spi.c: support clock polarity and phase Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org> --- M bitbang_spi.c 1 file changed, 70 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/49255/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/49255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Gerrit-Change-Number: 49255 Gerrit-PatchSet: 6 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: bitbang-spi.c: support clock polarity and phase
by Xiang Wang (Code Review) 09 Jan '21

09 Jan '21

Attention is currently required from: Stefan Reinauer, Edward O'Callaghan, Angel Pons. Hello build bot (Jenkins), Stefan Reinauer, Edward O'Callaghan, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/49255 to look at the new patch set (#5). Change subject: bitbang-spi.c: support clock polarity and phase ...................................................................... bitbang-spi.c: support clock polarity and phase Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Signed-off-by: Xiang Wang <merle(a)hardenedlinux.org> --- M bitbang_spi.c 1 file changed, 79 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/49255/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/49255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d Gerrit-Change-Number: 49255 Gerrit-PatchSet: 5 Gerrit-Owner: Xiang Wang <merle(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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flashrom-gerrit January 2021