Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57000 )
Change subject: mb/google/brya: set tcc_offset value to 10 ......................................................................
mb/google/brya: set tcc_offset value to 10
Set tcc_offset value to 10 in devicetree for Thermal Control Circuit (TCC) activation feature. This value is suggested by Thermal team.
BUGb=b:195706434 BRANCH=None TEST=Built for brya platform and verified the MSR value
Change-Id: I22573e8ca935d99a16b0876768df169db4e61c4d Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/57000 Reviewed-by: EricR Lai ericr_lai@compal.corp-partner.google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 3281902..762aa84 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -19,6 +19,8 @@ # DPTF enable register "dptf_enable" = "1"
+ register "tcc_offset" = "10" # TCC of 90 + # Enable heci communication register "HeciEnabled" = "1"