Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83958?usp=email )
(
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/cannonlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT ......................................................................
soc/intel/cannonlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option `SOC_INTEL_CANNONLAKE_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic config option.
TEST=Able to build and boot google/hatch without any functional impact while debugging.
Change-Id: Ifad11652b5fa6ff14f713f55a721cdbbfbfde471 Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83958 Reviewed-by: Felix Held felix-coreboot@felixheld.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/romstage/fsp_params.c 2 files changed, 1 insertion(+), 13 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 3aa06f4..d012dad 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -321,17 +321,6 @@ config FSP_FD_PATH_2 default "3rdparty/fsp/CometLakeFspBinPkg/CometLake2/Fsp.fd" if SOC_INTEL_COMETLAKE_1_2
-config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT - int "Debug Consent for CNL" - # USB DBC is more common for developers so make this default to 3 if - # SOC_INTEL_DEBUG_CONSENT=y - default 3 if SOC_INTEL_DEBUG_CONSENT - default 0 - help - This is to control debug interface on SOC. - Setting non-zero value will allow to use DBC or DCI to debug SOC. - PlatformDebugConsent in FspmUpd.h has the details. - config PRERAM_CBMEM_CONSOLE_SIZE hex default 0xe00 diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 2b25285..f0dd1c3 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -124,8 +124,7 @@ m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS);
/* Set debug probe type */ - m_cfg->PlatformDebugConsent = - CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT; + m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* Configure VT-d */ tconfig->VtdDisable = 0;