[coreboot-gerrit] Change in coreboot[master]: mb/google/sarien: Add VBT extracted from Chrome OS

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60735 )

Change subject: mb/google/sarien: Add VBT extracted from Chrome OS
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mb/google/sarien: Add VBT extracted from Chrome OS

The VBT is extracted from Chromium OS in developer mode with the device
running firwmare .

$ sudo dmesg | grep ' DMI:'
    [    0.000000] DMI: Dell Inc. Sarien/Sarien, BIOS Google_Sarien.12200.99.0 07/29/2020
    $ sudo cbmem -1
    coreboot-v1.9308_26_0.0.22-8761-gdba94f429a Wed Jul 29 16:09:30 UTC 2020 bootblock starting (log level: 8)...
    […]
    coreboot-v1.9308_26_0.0.22-8761-gdba94f429a Wed Jul 29 16:09:30 UTC 2020 ramstage starting (log level: 8)...
    […]
    CBFS: Locating 'vbt.bin'
    CBFS: Found @ offset 614c0 size 4a0
    Found a VBT of 4608 bytes after decompression
    […]
    $ sudo cp /sys/kernel/debug/dri/0/i915_vbt vbt.bin

Using the Chrome OS recovery image, Matt DeVillier verified, that the
Sarien VBT is identical to Arcada, so add the VBT for all variants.

Change-Id: Ibab8a7b0b3f721ca434ac38b51528b81e66f3bb7
Signed-off-by: Paul Menzel 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60735
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Matt DeVillier 
Reviewed-by: Tim Wawrzynczak 
---
M src/mainboard/google/sarien/Kconfig
A src/mainboard/google/sarien/data.vbt
2 files changed, 6 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved
  Angel Pons: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/google/sarien/Kconfig b/src/mainboard/google/sarien/Kconfig
index 42c3aba..d58f64d 100644
--- a/src/mainboard/google/sarien/Kconfig
+++ b/src/mainboard/google/sarien/Kconfig
@@ -10,6 +10,7 @@
    select GOOGLE_SMBIOS_MAINBOARD_VERSION
    select HAVE_ACPI_RESUME
    select HAVE_ACPI_TABLES
+	select INTEL_GMA_HAVE_VBT
    select INTEL_LPSS_UART_FOR_CONSOLE
    select MAINBOARD_HAS_CHROMEOS
    select MAINBOARD_HAS_I2C_TPM_CR50
@@ -91,4 +92,9 @@
    select HAS_RECOVERY_MRC_CACHE
    select VBOOT_LID_SWITCH

+# Override the default variant behavior, since the data.vbt is the same
+# for all variants.
+config INTEL_GMA_VBT_FILE
+	default "src/mainboard/$(MAINBOARDDIR)/data.vbt"
+
 endif # BOARD_GOOGLE_BASEBOARD_SARIEN
diff --git a/src/mainboard/google/sarien/data.vbt b/src/mainboard/google/sarien/data.vbt
new file mode 100644
index 0000000..f9c498e
--- /dev/null
+++ b/src/mainboard/google/sarien/data.vbt
Binary files differ