[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Update i2c support

[Marshall Dawson (Code Review)]

Hello build bot (Jenkins), Martin Roth, Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33763

to look at the new patch set (#10).

Change subject: soc/amd/picasso: Update i2c support
......................................................................

soc/amd/picasso: Update i2c support

Change the stoneyridge definitions into picasso.  The named 0 and 1
buses are controlled by the PSP and not directly accessible by host
firmware.  I2C4 operates only in slave mode so is not added to to
the bus clear-after-reset sequence.

The I2C controller is fundamentally the same as on Stoney Ridge so
the ability to clear a potentially jammed bus is still required.

Program Picasso's new pad control registers in the MISC AcpiMmio
space according to the recommended settings.

Signed-off-by: Marshall Dawson 
Change-Id: Ibbc5504ebc36654e28c79fe3ae17cc0d9255118f
---
M src/soc/amd/picasso/acpi/globalnvs.asl
M src/soc/amd/picasso/acpi/sb_pci0_fch.asl
M src/soc/amd/picasso/i2c.c
M src/soc/amd/picasso/include/soc/i2c.h
M src/soc/amd/picasso/include/soc/iomap.h
M src/soc/amd/picasso/include/soc/southbridge.h
M src/soc/amd/picasso/southbridge.c
7 files changed, 96 insertions(+), 75 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/33763/10