Attention is currently required from: Ana Carolina Cabral, Felix Held, Fred Reitberger, Jason Glenesk, Martin Roth, Matt DeVillier, Matt DeVillier, Paul Menzel.
Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84915?usp=email
to look at the new patch set (#9).
Change subject: driver/amd/opensil: Add PHX OpenSIL POC TP2/TP3 calls ......................................................................
driver/amd/opensil: Add PHX OpenSIL POC TP2/TP3 calls
Call OpenSIL timepoint 2 for further initialization of AMD SoC after coreboot has performed PCIe enumeration, and timepoint 3 for late SoC IPs programming and register locking closer to payload load prior to OS handoff. For future refactors, other generic OpenSIL calls from vendorcode/src/amd/opensil may be moved into the driver directory as well.
Change-Id: I8c335211bf36118fe1d6b7dacbf4064c1d7d3a38 Signed-off-by: Nicolas Kochlowski nickkochlowski@gmail.com --- A src/drivers/amd/opensil/Kconfig A src/drivers/amd/opensil/Makefile.mk A src/drivers/amd/opensil/amd_silicon_init.c M src/soc/amd/phoenix/Kconfig M src/soc/amd/phoenix/chip.c M src/vendorcode/amd/opensil/opensil.h 6 files changed, 59 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/84915/9