Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.
Hello Jincheng Li,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/83326?usp=email
to review the following change.
Change subject: soc/intel/xeon_sp/gnr: Add dimm_slot configuration ......................................................................
soc/intel/xeon_sp/gnr: Add dimm_slot configuration
Add sample DIMM slot configuration table for avenuecity CRB and beechnutcity CRB. This table will be used to fill SMBIOS type 17 table.
TEST=Boot on intel/avenuecity CRB It will help to update Locator, Bank Locator and Asset Tag with the value described in dimm_slot_config_table
Change-Id: I53556c02eb75204994a1bcb42eccb940e83bd532 Signed-off-by: Jincheng Li jincheng.li@intel.com Signed-off-by: Shuo Liu shuo.liu@intel.com --- M src/mainboard/intel/avenuecity_crb/Makefile.mk A src/mainboard/intel/avenuecity_crb/config/dimm_slot.c M src/mainboard/intel/avenuecity_crb/ramstage.c M src/mainboard/intel/avenuecity_crb/romstage.c M src/mainboard/intel/beechnutcity_crb/Makefile.mk A src/mainboard/intel/beechnutcity_crb/config/dimm_slot.c M src/mainboard/intel/beechnutcity_crb/ramstage.c M src/mainboard/intel/beechnutcity_crb/romstage.c A src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h 9 files changed, 147 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/83326/1
diff --git a/src/mainboard/intel/avenuecity_crb/Makefile.mk b/src/mainboard/intel/avenuecity_crb/Makefile.mk index 2e1a74a..cfff6d3 100644 --- a/src/mainboard/intel/avenuecity_crb/Makefile.mk +++ b/src/mainboard/intel/avenuecity_crb/Makefile.mk @@ -2,5 +2,7 @@
bootblock-y += bootblock.c romstage-y += romstage.c +romstage-y += config/dimm_slot.c romstage-y += config/iio.c +ramstage-y += config/dimm_slot.c ramstage-y += ramstage.c diff --git a/src/mainboard/intel/avenuecity_crb/config/dimm_slot.c b/src/mainboard/intel/avenuecity_crb/config/dimm_slot.c new file mode 100644 index 0000000..db7adf1 --- /dev/null +++ b/src/mainboard/intel/avenuecity_crb/config/dimm_slot.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <commonlib/helpers.h> +#include <soc/dimm_slot.h> + +/* + * _DIMM_SLOT_CFG_STRUCT(socket, channel, dimm, dev_locator, bank_locator, asset_tag) + */ +static const struct dimm_slot_config dimm_slot_config_table[] = { + _DIMM_SLOT_CFG_STRUCT(0, 0, 0, "CPU0_DIMM_A1", "BANK 0", "CPU0_DIMM_A1_AssetTag"), +}; + +const struct dimm_slot_config *get_dimm_slot_config_table(int *size) +{ + *size = ARRAY_SIZE(dimm_slot_config_table); + return dimm_slot_config_table; +} diff --git a/src/mainboard/intel/avenuecity_crb/ramstage.c b/src/mainboard/intel/avenuecity_crb/ramstage.c index a09016d..1db2568 100644 --- a/src/mainboard/intel/avenuecity_crb/ramstage.c +++ b/src/mainboard/intel/avenuecity_crb/ramstage.c @@ -1,8 +1,37 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <soc/dimm_slot.h> #include <soc/ramstage.h>
void mainboard_silicon_init_params(FSPS_UPD *params) {
} + +void smbios_fill_dimm_locator(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + int size; + const struct dimm_slot_config *dimm_slot_config_table = get_dimm_slot_config_table(&size); + + for (int i = 0; i < size; i++) + if (DIMM_SLOT_EQUAL(dimm_slot_config_table[i], + dimm->soc_num, dimm->channel_num, dimm->dimm_num)) { + const char *locator = dimm_slot_config_table[i].dev_locator; + t->device_locator = smbios_add_string(t->eos, locator); + locator = dimm_slot_config_table[i].bank_locator; + t->bank_locator = smbios_add_string(t->eos, locator); + } +} + +void smbios_fill_dimm_asset_tag(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + int size; + const struct dimm_slot_config *dimm_slot_config_table = get_dimm_slot_config_table(&size); + + for (int i = 0; i < size; i++) + if (DIMM_SLOT_EQUAL(dimm_slot_config_table[i], + dimm->soc_num, dimm->channel_num, dimm->dimm_num)) { + const char *asset_tag = dimm_slot_config_table[i].asset_tag; + t->asset_tag = smbios_add_string(t->eos, asset_tag); + } +} diff --git a/src/mainboard/intel/avenuecity_crb/romstage.c b/src/mainboard/intel/avenuecity_crb/romstage.c index f0e67af..2de9dfe 100644 --- a/src/mainboard/intel/avenuecity_crb/romstage.c +++ b/src/mainboard/intel/avenuecity_crb/romstage.c @@ -7,6 +7,7 @@ #include <fmap_config.h> #include <device/device.h> #include <soc/ddr.h> +#include <soc/dimm_slot.h> #include <soc/iio.h> #include <soc/romstage.h>
@@ -43,6 +44,11 @@
bool mainboard_dimm_slot_exists(uint8_t socket, uint8_t channel, uint8_t dimm) { - //TODO: not implemented yet + int size; + const struct dimm_slot_config *dimm_slot_config_table = get_dimm_slot_config_table(&size); + + for (int i = 0; i < size; i++) + if (DIMM_SLOT_EQUAL(dimm_slot_config_table[i], socket, channel, dimm)) + return true; return false; } diff --git a/src/mainboard/intel/beechnutcity_crb/Makefile.mk b/src/mainboard/intel/beechnutcity_crb/Makefile.mk index 2e1a74a..cfff6d3 100644 --- a/src/mainboard/intel/beechnutcity_crb/Makefile.mk +++ b/src/mainboard/intel/beechnutcity_crb/Makefile.mk @@ -2,5 +2,7 @@
bootblock-y += bootblock.c romstage-y += romstage.c +romstage-y += config/dimm_slot.c romstage-y += config/iio.c +ramstage-y += config/dimm_slot.c ramstage-y += ramstage.c diff --git a/src/mainboard/intel/beechnutcity_crb/config/dimm_slot.c b/src/mainboard/intel/beechnutcity_crb/config/dimm_slot.c new file mode 100644 index 0000000..db7adf1 --- /dev/null +++ b/src/mainboard/intel/beechnutcity_crb/config/dimm_slot.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <commonlib/helpers.h> +#include <soc/dimm_slot.h> + +/* + * _DIMM_SLOT_CFG_STRUCT(socket, channel, dimm, dev_locator, bank_locator, asset_tag) + */ +static const struct dimm_slot_config dimm_slot_config_table[] = { + _DIMM_SLOT_CFG_STRUCT(0, 0, 0, "CPU0_DIMM_A1", "BANK 0", "CPU0_DIMM_A1_AssetTag"), +}; + +const struct dimm_slot_config *get_dimm_slot_config_table(int *size) +{ + *size = ARRAY_SIZE(dimm_slot_config_table); + return dimm_slot_config_table; +} diff --git a/src/mainboard/intel/beechnutcity_crb/ramstage.c b/src/mainboard/intel/beechnutcity_crb/ramstage.c index a09016d..1db2568 100644 --- a/src/mainboard/intel/beechnutcity_crb/ramstage.c +++ b/src/mainboard/intel/beechnutcity_crb/ramstage.c @@ -1,8 +1,37 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <soc/dimm_slot.h> #include <soc/ramstage.h>
void mainboard_silicon_init_params(FSPS_UPD *params) {
} + +void smbios_fill_dimm_locator(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + int size; + const struct dimm_slot_config *dimm_slot_config_table = get_dimm_slot_config_table(&size); + + for (int i = 0; i < size; i++) + if (DIMM_SLOT_EQUAL(dimm_slot_config_table[i], + dimm->soc_num, dimm->channel_num, dimm->dimm_num)) { + const char *locator = dimm_slot_config_table[i].dev_locator; + t->device_locator = smbios_add_string(t->eos, locator); + locator = dimm_slot_config_table[i].bank_locator; + t->bank_locator = smbios_add_string(t->eos, locator); + } +} + +void smbios_fill_dimm_asset_tag(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + int size; + const struct dimm_slot_config *dimm_slot_config_table = get_dimm_slot_config_table(&size); + + for (int i = 0; i < size; i++) + if (DIMM_SLOT_EQUAL(dimm_slot_config_table[i], + dimm->soc_num, dimm->channel_num, dimm->dimm_num)) { + const char *asset_tag = dimm_slot_config_table[i].asset_tag; + t->asset_tag = smbios_add_string(t->eos, asset_tag); + } +} diff --git a/src/mainboard/intel/beechnutcity_crb/romstage.c b/src/mainboard/intel/beechnutcity_crb/romstage.c index f0e67af..2de9dfe 100644 --- a/src/mainboard/intel/beechnutcity_crb/romstage.c +++ b/src/mainboard/intel/beechnutcity_crb/romstage.c @@ -7,6 +7,7 @@ #include <fmap_config.h> #include <device/device.h> #include <soc/ddr.h> +#include <soc/dimm_slot.h> #include <soc/iio.h> #include <soc/romstage.h>
@@ -43,6 +44,11 @@
bool mainboard_dimm_slot_exists(uint8_t socket, uint8_t channel, uint8_t dimm) { - //TODO: not implemented yet + int size; + const struct dimm_slot_config *dimm_slot_config_table = get_dimm_slot_config_table(&size); + + for (int i = 0; i < size; i++) + if (DIMM_SLOT_EQUAL(dimm_slot_config_table[i], socket, channel, dimm)) + return true; return false; } diff --git a/src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h b/src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h new file mode 100644 index 0000000..1285a33 --- /dev/null +++ b/src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SOC_DIMM_SLOT_H_ +#define _SOC_DIMM_SLOT_H_ + +#include <stdint.h> + +struct dimm_slot_config { + uint8_t socket; + uint8_t channel; + uint8_t dimm; + /* + * Refer to DSP0134_3.6.0.pdf + * page 103 'Device Locator', 'Bank Locator' and 'Asset Tag'. + */ + const char *dev_locator; + const char *bank_locator; + const char *asset_tag; +}; + +#define _DIMM_SLOT_CFG_STRUCT(s, c, d, dl, bl, at) {\ + .socket = s,\ + .channel = c,\ + .dimm = d,\ + .dev_locator = dl,\ + .bank_locator = bl,\ + .asset_tag = at\ +} + +#define DIMM_SLOT_EQUAL(dimm_slot, s, c, d) (\ + (dimm_slot.socket == s) &&\ + (dimm_slot.channel == c) &&\ + (dimm_slot.dimm == d)) + +const struct dimm_slot_config *get_dimm_slot_config_table(int *size); + +#endif /* _SOC_DIMM_SLOT_H_ */