Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83946?usp=email )
Change subject: soc/intel/common/block/cpu: Use the effective way size for NEM+ ......................................................................
soc/intel/common/block/cpu: Use the effective way size for NEM+
The Last Level Cache (LLC) way size (or sets) is not necessarily a power of two. However, on some platforms, the effective way size, the way size which should be considered for No-Eviction Mode (NEM) purposes is the biggest power of two of the way size.
Alder Lake External Design Specification #627270 "3.5.2 No-Eviction Mode (NEM) Sizes" provides some understanding that the maximum NEM size depends on the number of CBO which used to be accessible via MSR 0x396. Unfortunately, this MSR is not available and as a general implementation the recommendation is to use the biggest power of two of the way size instead.
The Kconfig `INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE' is introduce to control this behavior.
BUG=b:TBD TEST=Verified on rex
Change-Id: I5cb66da0aa977eecb64a0021268a6827747c521c Signed-off-by: Jeremy Compostella jeremy.compostella@intel.com --- M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/common/block/cpu/car/cache_as_ram.S 2 files changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/83946/1
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 814de73..a015db2 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -81,6 +81,15 @@ ENHANCED NEM guarantees that modified data is always kept in cache while clean data is replaced.
+config INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE + bool + help + The LLC way size (or sets) is not necessarily a power of + two. However, on some platforms, the effective way size, the + way size which should be considered for NEM purposes is the + biggest power of two of the way size instead of the entire + way size. + config CAR_HAS_SF_MASKS bool depends on INTEL_CAR_NEM_ENHANCED diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index ba98f1b..f68ac4c 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -495,6 +495,19 @@ div %ebx /* way size */ mov %eax, %ecx
+#if CONFIG(INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE) + /* + * Limit the way size to the effective way size defined + * as the biggest power of two of the way size. + */ + lzcnt %ecx, %eax + movl $31, %ecx + subl %eax, %ecx + movl $0x01, %eax + shl %cl, %eax + movl %eax, %ecx +#endif + /* * Check if way size if bigger than the cache ram size. * Then we need to allocate just one way for non-eviction