Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4171
-gerrit
commit c1823cb069789273287a8beace3a62aac5b783ef Author: Duncan Laurie dlaurie@chromium.org Date: Wed May 15 15:05:38 2013 -0700
slippy: Put SerialIO devices in PCI mode
The device at function 0 also needs to be enabled or the kernel will ignore all other functions.
00:15.0 DMA controller: Intel Corporation Lynx Point-LP Low Power Sub-System DMA (rev 03) 00:15.1 Serial bus controller [0c80]: Intel Corporation Lynx Point-LP I2C Controller #0 (rev 03) 00:15.2 Serial bus controller [0c80]: Intel Corporation Lynx Point-LP I2C Controller #1 (rev 03)
Change-Id: I0e1bc7bb719756496c46664d66dc1b1cf2f4d1ba Signed-off-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: https://gerrit.chromium.org/gerrit/51370 Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/mainboard/google/slippy/devicetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb index 665e6dc..143147f 100644 --- a/src/mainboard/google/slippy/devicetree.cb +++ b/src/mainboard/google/slippy/devicetree.cb @@ -56,13 +56,13 @@ chip northbridge/intel/haswell register "sata_ahci" = "0x1" register "sata_port_map" = "0x1"
- register "sio_acpi_mode" = "1" + register "sio_acpi_mode" = "0" register "sio_i2c0_voltage" = "0" # 3.3V register "sio_i2c1_voltage" = "0" # 3.3V
device pci 13.0 off end # Smart Sound Audio DSP device pci 14.0 on end # USB3 XHCI - device pci 15.0 off end # Serial I/O DMA + device pci 15.0 on end # Serial I/O DMA device pci 15.1 on end # I2C0 device pci 15.2 on end # I2C1 device pci 15.3 off end # GSPI0