Attention is currently required from: Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50710 )
Change subject: mb/asrock/e350m1: Configure HWM ......................................................................
Patch Set 3:
(3 comments)
File src/mainboard/asrock/e350m1/bootblock.c:
https://review.coreboot.org/c/coreboot/+/50710/comment/25d27f0a_7236c3c5 PS3, Line 22: nct5572d_hwm_set_sysfan_out_voltage_mode(HWM_BASE, false); Looks OK, matches vendor firmware settings
https://review.coreboot.org/c/coreboot/+/50710/comment/66911fea_d3b24c64 PS3, Line 29: nct5572d_hwm_enable_peci(HWM_BASE, 0x5c); PECI should be dropped
https://review.coreboot.org/c/coreboot/+/50710/comment/92841c00_23bea4d4 PS3, Line 52: CPUTIN Note that CPUTIN is broken in coreboot, because it defaults to "CPU diode". This can be changed through HWM bank 0 index 0x5d:
nuvoton_hwm_select_bank(base, 0); pnp_unset_and_set_hwm5_index(base, 0x5d, 1 << 2, 0 << 2);
The register bitfields are the same on NCT6776: https://imgur.com/1K4fQ14.png