Shreesh Chhabbi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47983 )
Change subject: soc/common: Program SF Mask MSRs for eNEM
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Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47983/2/src/soc/intel/common/block/...
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/47983/2/src/soc/intel/common/block/...
PS2, Line 412: mov %ecx, %eax
This doesn't look right. It is writing # of LLC ways to the mask. […]
Furquan, if total number of LLC ways is 12, my understanding is only 12 LSB bits are to be set. Correct me if I am wrong.
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