Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46997 )
Change subject: mb/google/auron: Clean up romstage logic ......................................................................
mb/google/auron: Clean up romstage logic
Refactor code to allow dropping unnecessary files.
Change-Id: I2920c6f8d3f5dbff6148419ab24edbd460a6795e Signed-off-by: Angel Pons th3fanbus@gmail.com --- D src/mainboard/google/auron/romstage.c M src/mainboard/google/auron/variant.h D src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h M src/mainboard/google/auron/variants/auron_paine/pei_data.c M src/mainboard/google/auron/variants/auron_paine/spd/spd.c M src/mainboard/google/auron/variants/auron_paine/variant.c D src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h M src/mainboard/google/auron/variants/auron_yuna/pei_data.c M src/mainboard/google/auron/variants/auron_yuna/spd/spd.c M src/mainboard/google/auron/variants/auron_yuna/variant.c D src/mainboard/google/auron/variants/buddy/include/variant/spd.h M src/mainboard/google/auron/variants/buddy/pei_data.c M src/mainboard/google/auron/variants/buddy/spd/spd.c D src/mainboard/google/auron/variants/gandof/include/variant/spd.h M src/mainboard/google/auron/variants/gandof/pei_data.c M src/mainboard/google/auron/variants/gandof/spd/spd.c M src/mainboard/google/auron/variants/gandof/variant.c D src/mainboard/google/auron/variants/lulu/include/variant/spd.h M src/mainboard/google/auron/variants/lulu/pei_data.c M src/mainboard/google/auron/variants/lulu/spd/spd.c M src/mainboard/google/auron/variants/lulu/variant.c D src/mainboard/google/auron/variants/samus/include/variant/spd.h M src/mainboard/google/auron/variants/samus/pei_data.c M src/mainboard/google/auron/variants/samus/spd/spd.c M src/mainboard/google/auron/variants/samus/variant.c 25 files changed, 106 insertions(+), 158 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/46997/1
diff --git a/src/mainboard/google/auron/romstage.c b/src/mainboard/google/auron/romstage.c deleted file mode 100644 index 7ecddcf..0000000 --- a/src/mainboard/google/auron/romstage.c +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <ec/google/chromeec/ec.h> -#include <soc/intel/broadwell/pei_data.h> -#include <soc/intel/broadwell/pei_wrapper.h> -#include <soc/intel/broadwell/romstage.h> -#include <variant/spd.h> -#include "variant.h" - -__weak void variant_romstage_entry(struct romstage_params *rp) -{ -} - -void mainboard_post_raminit(struct romstage_params *rp) -{ - /* Do variant-specific init */ - variant_romstage_entry(rp); -} diff --git a/src/mainboard/google/auron/variant.h b/src/mainboard/google/auron/variant.h index 5ee400f..96518a7 100644 --- a/src/mainboard/google/auron/variant.h +++ b/src/mainboard/google/auron/variant.h @@ -8,7 +8,7 @@
int variant_smbios_data(struct device *dev, int *handle, unsigned long *current); -void variant_romstage_entry(struct romstage_params *rp); + void lan_init(void);
#endif diff --git a/src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h b/src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h deleted file mode 100644 index 7e34ca1..0000000 --- a/src/mainboard/google/auron/variants/auron_paine/include/variant/spd.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef MAINBOARD_SPD_H -#define MAINBOARD_SPD_H - -#define SPD_LEN 256 - -#define SPD_DRAM_TYPE 2 -#define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 -#define SPD_DENSITY_BANKS 4 -#define SPD_ADDRESSING 5 -#define SPD_ORGANIZATION 7 -#define SPD_BUS_DEV_WIDTH 8 -#define SPD_PART_OFF 128 -#define SPD_PART_LEN 18 - -/* Auron board memory configuration GPIOs */ -#define SPD_GPIO_BIT0 13 -#define SPD_GPIO_BIT1 9 -#define SPD_GPIO_BIT2 47 - -#endif diff --git a/src/mainboard/google/auron/variants/auron_paine/pei_data.c b/src/mainboard/google/auron/variants/auron_paine/pei_data.c index ac22a8f..756dfac 100644 --- a/src/mainboard/google/auron/variants/auron_paine/pei_data.c +++ b/src/mainboard/google/auron/variants/auron_paine/pei_data.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/intel/broadwell/pch/gpio.h> #include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h>
diff --git a/src/mainboard/google/auron/variants/auron_paine/spd/spd.c b/src/mainboard/google/auron/variants/auron_paine/spd/spd.c index 5521c3f..a2d55ea 100644 --- a/src/mainboard/google/auron/variants/auron_paine/spd/spd.c +++ b/src/mainboard/google/auron/variants/auron_paine/spd/spd.c @@ -10,7 +10,23 @@ #include <soc/intel/broadwell/romstage.h> #include <ec/google/chromeec/ec.h> #include <mainboard/google/auron/ec.h> -#include <variant/spd.h> + +#define SPD_LEN 256 + +#define SPD_DRAM_TYPE 2 +#define SPD_DRAM_DDR3 0x0b +#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DENSITY_BANKS 4 +#define SPD_ADDRESSING 5 +#define SPD_ORGANIZATION 7 +#define SPD_BUS_DEV_WIDTH 8 +#define SPD_PART_OFF 128 +#define SPD_PART_LEN 18 + +/* Auron board memory configuration GPIOs */ +#define SPD_GPIO_BIT0 13 +#define SPD_GPIO_BIT1 9 +#define SPD_GPIO_BIT2 47
static void mainboard_print_spd_info(uint8_t spd[]) { diff --git a/src/mainboard/google/auron/variants/auron_paine/variant.c b/src/mainboard/google/auron/variants/auron_paine/variant.c index 4cafe30..d925f9f 100644 --- a/src/mainboard/google/auron/variants/auron_paine/variant.c +++ b/src/mainboard/google/auron/variants/auron_paine/variant.c @@ -3,6 +3,7 @@ #include <smbios.h> #include <variant/onboard.h> #include <mainboard/google/auron/variant.h> +#include <soc/intel/broadwell/romstage.h>
int variant_smbios_data(struct device *dev, int *handle, unsigned long *current) { @@ -20,3 +21,7 @@
return len; } + +void mainboard_post_raminit(struct romstage_params *rp) +{ +} diff --git a/src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h b/src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h deleted file mode 100644 index 7e34ca1..0000000 --- a/src/mainboard/google/auron/variants/auron_yuna/include/variant/spd.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef MAINBOARD_SPD_H -#define MAINBOARD_SPD_H - -#define SPD_LEN 256 - -#define SPD_DRAM_TYPE 2 -#define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 -#define SPD_DENSITY_BANKS 4 -#define SPD_ADDRESSING 5 -#define SPD_ORGANIZATION 7 -#define SPD_BUS_DEV_WIDTH 8 -#define SPD_PART_OFF 128 -#define SPD_PART_LEN 18 - -/* Auron board memory configuration GPIOs */ -#define SPD_GPIO_BIT0 13 -#define SPD_GPIO_BIT1 9 -#define SPD_GPIO_BIT2 47 - -#endif diff --git a/src/mainboard/google/auron/variants/auron_yuna/pei_data.c b/src/mainboard/google/auron/variants/auron_yuna/pei_data.c index ac22a8f..756dfac 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/pei_data.c +++ b/src/mainboard/google/auron/variants/auron_yuna/pei_data.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/intel/broadwell/pch/gpio.h> #include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h>
diff --git a/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c b/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c index 5521c3f..a2d55ea 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c +++ b/src/mainboard/google/auron/variants/auron_yuna/spd/spd.c @@ -10,7 +10,23 @@ #include <soc/intel/broadwell/romstage.h> #include <ec/google/chromeec/ec.h> #include <mainboard/google/auron/ec.h> -#include <variant/spd.h> + +#define SPD_LEN 256 + +#define SPD_DRAM_TYPE 2 +#define SPD_DRAM_DDR3 0x0b +#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DENSITY_BANKS 4 +#define SPD_ADDRESSING 5 +#define SPD_ORGANIZATION 7 +#define SPD_BUS_DEV_WIDTH 8 +#define SPD_PART_OFF 128 +#define SPD_PART_LEN 18 + +/* Auron board memory configuration GPIOs */ +#define SPD_GPIO_BIT0 13 +#define SPD_GPIO_BIT1 9 +#define SPD_GPIO_BIT2 47
static void mainboard_print_spd_info(uint8_t spd[]) { diff --git a/src/mainboard/google/auron/variants/auron_yuna/variant.c b/src/mainboard/google/auron/variants/auron_yuna/variant.c index 4cafe30..d925f9f 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/variant.c +++ b/src/mainboard/google/auron/variants/auron_yuna/variant.c @@ -3,6 +3,7 @@ #include <smbios.h> #include <variant/onboard.h> #include <mainboard/google/auron/variant.h> +#include <soc/intel/broadwell/romstage.h>
int variant_smbios_data(struct device *dev, int *handle, unsigned long *current) { @@ -20,3 +21,7 @@
return len; } + +void mainboard_post_raminit(struct romstage_params *rp) +{ +} diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/spd.h b/src/mainboard/google/auron/variants/buddy/include/variant/spd.h deleted file mode 100644 index 7f7914d..0000000 --- a/src/mainboard/google/auron/variants/buddy/include/variant/spd.h +++ /dev/null @@ -1,6 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef MAINBOARD_SPD_H -#define MAINBOARD_SPD_H - -#endif diff --git a/src/mainboard/google/auron/variants/buddy/pei_data.c b/src/mainboard/google/auron/variants/buddy/pei_data.c index db4ef36..b4135bd 100644 --- a/src/mainboard/google/auron/variants/buddy/pei_data.c +++ b/src/mainboard/google/auron/variants/buddy/pei_data.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/intel/broadwell/pch/gpio.h> #include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h> +#include <soc/intel/broadwell/romstage.h>
void mainboard_fill_pei_data(struct pei_data *pei_data) { @@ -42,3 +42,7 @@ /* P4: Card Reader, CRS1 */ pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0); } + +void mainboard_post_raminit(struct romstage_params *rp) +{ +} diff --git a/src/mainboard/google/auron/variants/buddy/spd/spd.c b/src/mainboard/google/auron/variants/buddy/spd/spd.c index e74e6b9..da5f331 100644 --- a/src/mainboard/google/auron/variants/buddy/spd/spd.c +++ b/src/mainboard/google/auron/variants/buddy/spd/spd.c @@ -2,7 +2,6 @@
#include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h> -#include <variant/spd.h>
/* Copy SPD data for on-board memory */ void mainboard_fill_spd_data(struct pei_data *pei_data) diff --git a/src/mainboard/google/auron/variants/gandof/include/variant/spd.h b/src/mainboard/google/auron/variants/gandof/include/variant/spd.h deleted file mode 100644 index dfcd7cc..0000000 --- a/src/mainboard/google/auron/variants/gandof/include/variant/spd.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef MAINBOARD_SPD_H -#define MAINBOARD_SPD_H - -#define SPD_LEN 256 - -#define SPD_DRAM_TYPE 2 -#define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 -#define SPD_DENSITY_BANKS 4 -#define SPD_ADDRESSING 5 -#define SPD_ORGANIZATION 7 -#define SPD_BUS_DEV_WIDTH 8 -#define SPD_PART_OFF 128 -#define SPD_PART_LEN 18 - -/* Gandof board memory configuration GPIOs */ -#define SPD_GPIO_BIT0 13 -#define SPD_GPIO_BIT1 9 -#define SPD_GPIO_BIT2 47 - -#endif diff --git a/src/mainboard/google/auron/variants/gandof/pei_data.c b/src/mainboard/google/auron/variants/gandof/pei_data.c index ac22a8f..756dfac 100644 --- a/src/mainboard/google/auron/variants/gandof/pei_data.c +++ b/src/mainboard/google/auron/variants/gandof/pei_data.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/intel/broadwell/pch/gpio.h> #include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h>
diff --git a/src/mainboard/google/auron/variants/gandof/spd/spd.c b/src/mainboard/google/auron/variants/gandof/spd/spd.c index 5521c3f..73dd3de 100644 --- a/src/mainboard/google/auron/variants/gandof/spd/spd.c +++ b/src/mainboard/google/auron/variants/gandof/spd/spd.c @@ -10,7 +10,23 @@ #include <soc/intel/broadwell/romstage.h> #include <ec/google/chromeec/ec.h> #include <mainboard/google/auron/ec.h> -#include <variant/spd.h> + +#define SPD_LEN 256 + +#define SPD_DRAM_TYPE 2 +#define SPD_DRAM_DDR3 0x0b +#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DENSITY_BANKS 4 +#define SPD_ADDRESSING 5 +#define SPD_ORGANIZATION 7 +#define SPD_BUS_DEV_WIDTH 8 +#define SPD_PART_OFF 128 +#define SPD_PART_LEN 18 + +/* Gandof board memory configuration GPIOs */ +#define SPD_GPIO_BIT0 13 +#define SPD_GPIO_BIT1 9 +#define SPD_GPIO_BIT2 47
static void mainboard_print_spd_info(uint8_t spd[]) { diff --git a/src/mainboard/google/auron/variants/gandof/variant.c b/src/mainboard/google/auron/variants/gandof/variant.c index 6ee1026..4ebab64 100644 --- a/src/mainboard/google/auron/variants/gandof/variant.c +++ b/src/mainboard/google/auron/variants/gandof/variant.c @@ -24,7 +24,7 @@ return len; }
-void variant_romstage_entry(struct romstage_params *rp) +void mainboard_post_raminit(struct romstage_params *rp) { if (rp->power_state->prev_sleep_state != ACPI_S3) google_chromeec_kbbacklight(75); diff --git a/src/mainboard/google/auron/variants/lulu/include/variant/spd.h b/src/mainboard/google/auron/variants/lulu/include/variant/spd.h deleted file mode 100644 index da8c387..0000000 --- a/src/mainboard/google/auron/variants/lulu/include/variant/spd.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef MAINBOARD_SPD_H -#define MAINBOARD_SPD_H - -#define SPD_LEN 256 - -#define SPD_DRAM_TYPE 2 -#define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 -#define SPD_DENSITY_BANKS 4 -#define SPD_ADDRESSING 5 -#define SPD_ORGANIZATION 7 -#define SPD_BUS_DEV_WIDTH 8 -#define SPD_PART_OFF 128 -#define SPD_PART_LEN 18 - -/* Lulu board memory configuration GPIOs */ -#define SPD_GPIO_BIT0 13 -#define SPD_GPIO_BIT1 9 -#define SPD_GPIO_BIT2 47 -#define SPD_GPIO_BIT3 8 - -#endif diff --git a/src/mainboard/google/auron/variants/lulu/pei_data.c b/src/mainboard/google/auron/variants/lulu/pei_data.c index 6ce9b35..46592cb 100644 --- a/src/mainboard/google/auron/variants/lulu/pei_data.c +++ b/src/mainboard/google/auron/variants/lulu/pei_data.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/intel/broadwell/pch/gpio.h> #include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h>
diff --git a/src/mainboard/google/auron/variants/lulu/spd/spd.c b/src/mainboard/google/auron/variants/lulu/spd/spd.c index b35a57f..8ce5c34 100644 --- a/src/mainboard/google/auron/variants/lulu/spd/spd.c +++ b/src/mainboard/google/auron/variants/lulu/spd/spd.c @@ -10,7 +10,24 @@ #include <soc/intel/broadwell/romstage.h> #include <ec/google/chromeec/ec.h> #include <mainboard/google/auron/ec.h> -#include <variant/spd.h> + +#define SPD_LEN 256 + +#define SPD_DRAM_TYPE 2 +#define SPD_DRAM_DDR3 0x0b +#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DENSITY_BANKS 4 +#define SPD_ADDRESSING 5 +#define SPD_ORGANIZATION 7 +#define SPD_BUS_DEV_WIDTH 8 +#define SPD_PART_OFF 128 +#define SPD_PART_LEN 18 + +/* Lulu board memory configuration GPIOs */ +#define SPD_GPIO_BIT0 13 +#define SPD_GPIO_BIT1 9 +#define SPD_GPIO_BIT2 47 +#define SPD_GPIO_BIT3 8
static void mainboard_print_spd_info(uint8_t spd[]) { diff --git a/src/mainboard/google/auron/variants/lulu/variant.c b/src/mainboard/google/auron/variants/lulu/variant.c index f45f765..9a60933 100644 --- a/src/mainboard/google/auron/variants/lulu/variant.c +++ b/src/mainboard/google/auron/variants/lulu/variant.c @@ -34,7 +34,7 @@ return len; }
-void variant_romstage_entry(struct romstage_params *rp) +void mainboard_post_raminit(struct romstage_params *rp) { if (rp->power_state->prev_sleep_state != ACPI_S3) google_chromeec_kbbacklight(75); diff --git a/src/mainboard/google/auron/variants/samus/include/variant/spd.h b/src/mainboard/google/auron/variants/samus/include/variant/spd.h deleted file mode 100644 index 79fbc1b..0000000 --- a/src/mainboard/google/auron/variants/samus/include/variant/spd.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef MAINBOARD_SPD_H -#define MAINBOARD_SPD_H - -#define SPD_LEN 256 - -#define SPD_DRAM_TYPE 2 -#define SPD_DRAM_DDR3 0x0b -#define SPD_DRAM_LPDDR3 0xf1 -#define SPD_DENSITY_BANKS 4 -#define SPD_ADDRESSING 5 -#define SPD_ORGANIZATION 7 -#define SPD_BUS_DEV_WIDTH 8 -#define SPD_PART_OFF 128 -#define SPD_PART_LEN 18 - -/* Samus board memory configuration GPIOs */ -#define SPD_GPIO_BIT0 69 -#define SPD_GPIO_BIT1 68 -#define SPD_GPIO_BIT2 67 -#define SPD_GPIO_BIT3 65 - -#endif diff --git a/src/mainboard/google/auron/variants/samus/pei_data.c b/src/mainboard/google/auron/variants/samus/pei_data.c index 8a9ed86..4ff3196 100644 --- a/src/mainboard/google/auron/variants/samus/pei_data.c +++ b/src/mainboard/google/auron/variants/samus/pei_data.c @@ -2,7 +2,6 @@
#include <stdint.h> #include <string.h> -#include <soc/intel/broadwell/pch/gpio.h> #include <soc/intel/broadwell/pei_data.h> #include <soc/intel/broadwell/pei_wrapper.h>
diff --git a/src/mainboard/google/auron/variants/samus/spd/spd.c b/src/mainboard/google/auron/variants/samus/spd/spd.c index a8ab2e3..08b8e0a 100644 --- a/src/mainboard/google/auron/variants/samus/spd/spd.c +++ b/src/mainboard/google/auron/variants/samus/spd/spd.c @@ -10,7 +10,24 @@ #include <soc/intel/broadwell/romstage.h> #include <ec/google/chromeec/ec.h> #include <mainboard/google/auron/ec.h> -#include <variant/spd.h> + +#define SPD_LEN 256 + +#define SPD_DRAM_TYPE 2 +#define SPD_DRAM_DDR3 0x0b +#define SPD_DRAM_LPDDR3 0xf1 +#define SPD_DENSITY_BANKS 4 +#define SPD_ADDRESSING 5 +#define SPD_ORGANIZATION 7 +#define SPD_BUS_DEV_WIDTH 8 +#define SPD_PART_OFF 128 +#define SPD_PART_LEN 18 + +/* Samus board memory configuration GPIOs */ +#define SPD_GPIO_BIT0 69 +#define SPD_GPIO_BIT1 68 +#define SPD_GPIO_BIT2 67 +#define SPD_GPIO_BIT3 65
static void mainboard_print_spd_info(uint8_t spd[]) { diff --git a/src/mainboard/google/auron/variants/samus/variant.c b/src/mainboard/google/auron/variants/samus/variant.c index 33f164c..6d80949 100644 --- a/src/mainboard/google/auron/variants/samus/variant.c +++ b/src/mainboard/google/auron/variants/samus/variant.c @@ -21,7 +21,7 @@ return 0; }
-void variant_romstage_entry(struct romstage_params *rp) +void mainboard_post_raminit(struct romstage_params *rp) { if (rp->power_state->prev_sleep_state != ACPI_S3) google_chromeec_kbbacklight(100);