[coreboot-gerrit] Change in coreboot[master]: mb/msi/ms7d25: Add correct memory init configuration

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63503 )

Change subject: mb/msi/ms7d25: Add correct memory init configuration
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mb/msi/ms7d25: Add correct memory init configuration

Tested with 4x KINGSTON KF3600C17D4/8GX DIMMs.

TEST=Include the microcode from vendor firmware and FSP blob from
Intel R&DC. Boot the platform and see it executing ramstage.

Signed-off-by: Michał Żygowski 
Change-Id: I98b9c77d791d18640cb05c133cb0bf14ad22dcdb
---
M src/mainboard/msi/ms7d25/devicetree.cb
M src/mainboard/msi/ms7d25/romstage_fsp_params.c
2 files changed, 18 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/63503/1

diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb
index faf8c38..b5be153 100644
--- a/src/mainboard/msi/ms7d25/devicetree.cb
+++ b/src/mainboard/msi/ms7d25/devicetree.cb
@@ -6,6 +6,9 @@

# Sagv Configuration
    register "sagv" = "SaGv_Enabled"
+	register "RMT" = "0"
+
+	register "enable_c6dram" = "1"

# USB Configuration
    # TODO: Verify
diff --git a/src/mainboard/msi/ms7d25/romstage_fsp_params.c b/src/mainboard/msi/ms7d25/romstage_fsp_params.c
index 412e3ab..389e359 100644
--- a/src/mainboard/msi/ms7d25/romstage_fsp_params.c
+++ b/src/mainboard/msi/ms7d25/romstage_fsp_params.c
@@ -9,22 +9,28 @@
 static const struct mb_cfg ddr4_mem_config = {
    .type = MEM_TYPE_DDR4,

+	/* According to DOC #573387 rcomp no longer have to be provided */
    .rcomp = {
-		/* Baseboard uses only 100ohm Rcomp resistor FIXME */
-		.resistor = 100,
+		/* Baseboard uses only 100ohm Rcomp resistor */
+		.resistor = 0,

-		/* Baseboard Rcomp target values FIXME */
-		.targets = { 50, 20, 25, 25, 25 },
+		/* Baseboard Rcomp target values */
+		.targets = { 0 },
    },
+	/* DDR DIMM configuration does not need to set DQ/DQS maps */
+	.dq_map = { 0 },
+	.dqs_map = { 0 },

.ect = true, /* Early Command Training */

-	.UserBd = BOARD_TYPE_DESKTOP, /* FIXME */
+	.UserBd = BOARD_TYPE_DESKTOP,

-	.LpDdrDqDqsReTraining = 1,
+	.LpDdrDqDqsReTraining = 0,	/* LPDDR only, set to 0 */
+
+	.CmdMirror = 0x33,

.ddr_config = {
-		.dq_pins_interleaved = false, /* FIXME */
+		.dq_pins_interleaved = true,
    },
 };

@@ -44,5 +50,7 @@

void mainboard_memory_init_params(FSPM_UPD *memupd)
 {
+	memupd->FspmConfig.FirstDimmBitMask = 0xA;
+
    memcfg_init(memupd, &ddr4_mem_config, &dimm_module_spd_info, false);
 }