[coreboot-gerrit] Change in coreboot[master]: vc/amd/fsp/picasso: add logical to lane number in port descriptor struct

[Felix Held (Code Review)]

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43660 )

Change subject: vc/amd/fsp/picasso: add logical to lane number in port descriptor struct
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43660/4//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/43660/4//COMMIT_MSG@11 
PS4, Line 11: fsp_pcie_descriptor struct.
> I think I found it in the PPR, but I don't see controller mappings unless they are implicit.

for Picasso and Dali there is some documentation in the PPR on that; the mapping on Pollock is different to that. I'll see that I can get that documented