[coreboot-gerrit] [S] Change in coreboot[master]: coreboot_table: Support sending EOP from payload

[Kapil Porwal (Code Review)]

Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74766 )

Change subject: coreboot_table: Support sending EOP from payload
......................................................................

coreboot_table: Support sending EOP from payload

Add support for sending EOP from payload

BUG=b:279184514
TEST=Verify sending EOP from depthcharge

Signed-off-by: Kapil Porwal 
Change-Id: I7c77c59006ff4721efecf5aa537216326c33166e
---
M src/commonlib/include/commonlib/coreboot_tables.h
M src/lib/coreboot_table.c
2 files changed, 37 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/74766/1

diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index e646b8b..a665209 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -82,6 +82,7 @@
    LB_TAG_PLATFORM_BLOB_VERSION	= 0x0038,
    LB_TAG_SMMSTOREV2		= 0x0039,
    LB_TAG_TPM_PPI_HANDOFF		= 0x003a,
+	LB_TAG_CSE_EOP			= 0x003b,
    LB_TAG_BOARD_CONFIG		= 0x0040,
    LB_TAG_ACPI_CNVS		= 0x0041,
    LB_TAG_TYPE_C_INFO		= 0x0042,
@@ -572,4 +573,10 @@
    lb_uint64_t rsdp_pointer; /* Address of the ACPI RSDP */
 };

+struct lb_cse_eop {
+	uint32_t tag;
+	uint32_t size;
+	void (*send)(void);
+};
+
 #endif
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index bee389d..292f4bb 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -464,6 +464,19 @@
    return (uintptr_t)lb_table_fini(head) - entry;
 }

+static void fill_cse_eop_info(struct lb_header *head)
+{
+	struct lb_cse_eop  *lb_eop;
+	printk(BIOS_INFO, "fill_cse_eop_info\n");
+
+	lb_eop = (struct lb_cse_eop *)lb_new_record(head);
+
+	lb_eop->tag = LB_TAG_CSE_EOP;
+	lb_eop->size = sizeof(*lb_eop);
+
+	lb_eop->send = lb_cse_send_eop_and_finalize;
+}
+
 static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
 {
    struct lb_header *head;
@@ -560,6 +573,8 @@
    if (CONFIG(HAVE_ACPI_TABLES))
    	lb_add_acpi_rsdp(head);

+	fill_cse_eop_info(head);
+
    /* Remember where my valid memory ranges are */
    return lb_table_fini(head);
 }