Pavel Sayekat has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35028 )
Change subject: superio/nuvoton/nct5539d: Add nuvoton NCT5539D specific superio.asl ......................................................................
Patch Set 7:
(2 comments)
o/
https://review.coreboot.org/c/coreboot/+/35028/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35028/7//COMMIT_MSG@10 PS7, Line 10:
Please describe, what works now, and how you tested this.
It is sourced from NCT6776 as it is directly used for NCT6791D for asrock-h110m-dvs port but just to make it independent from NCT6776 so that if any modifications needed can be done without touching NCT6776/acpi/superio.asl file and it is getting tested along with the https://review.coreboot.org/c/coreboot/+/34603 as a whole (or as a pair you can say).
https://review.coreboot.org/c/coreboot/+/35028/7/src/superio/nuvoton/nct5539... File src/superio/nuvoton/nct5539d/acpi/superio.asl:
https://review.coreboot.org/c/coreboot/+/35028/7/src/superio/nuvoton/nct5539... PS7, Line 167: #define PNP_DEVICE_ACTIVE ACT3
this is for one specific GPIO bank, right? is this intended?
That is just copied form superio/nuvoton/nct6776/acpi/superio.asl with a view that if any NCT5539D specific mod needed that could be done independently. Don't have very clear idea about it, perhaps you can tell me.