[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO for Gen1 SoC

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Shuo Liu, Tim Chu.

Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/83136?usp=email

to look at the new patch set (#4).

The following approvals got outdated and were removed:
Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp: Reserve MMIO for Gen1 SoC
......................................................................

soc/intel/xeon_sp: Reserve MMIO for Gen1 SoC

For Gen1 SoCs, the range starting from the end of VTd BAR to the end
of 32-bit domain MMIO resource window is reserved for unknown devices.
Get them reserved.

TEST=Build and boot on intel/archercity CRB

Change-Id: Ie133fe3173ce9696769c7247bd2524c7b21b1cf8
Signed-off-by: Shuo Liu 
---
M src/soc/intel/xeon_sp/chip_gen1.c
M src/soc/intel/xeon_sp/spr/ioat.c
2 files changed, 26 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/83136/4