[coreboot-gerrit] [L] Change in coreboot[master]: [WIP]aopen/dxplplusu: Support SMM_ASEG and SMM_TSEG

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Angel Pons, Kyösti Mälkki, Patrick Rudolph, Elyes Haouas.

Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/61517

to look at the new patch set (#5).

Change subject: [WIP]aopen/dxplplusu: Support SMM_ASEG and SMM_TSEG
......................................................................

[WIP]aopen/dxplplusu: Support SMM_ASEG and SMM_TSEG

Both SMM_ASEG and SMM_TSEG choices work.

There is periodic TCO timeout occuring.
At least with DEBUG_SMI kernel reports low memory corruption.

Change-Id: If20a7092117612a1a9e25eb6ac480e105acd57d7
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/intel/model_f2x/Kconfig
M src/cpu/intel/model_f2x/Makefile.inc
M src/cpu/intel/model_f2x/model_f2x_init.c
A src/cpu/intel/model_f2x/mp_init.c
M src/northbridge/intel/e7505/Kconfig
M src/northbridge/intel/e7505/e7505.h
M src/northbridge/intel/e7505/memmap.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/e7505/raminit.c
M src/southbridge/intel/common/smi.c
M src/southbridge/intel/i82801dx/Kconfig
M src/southbridge/intel/i82801dx/Makefile.inc
M src/southbridge/intel/i82801dx/fadt.c
M src/southbridge/intel/i82801dx/i82801dx.h
M src/southbridge/intel/i82801dx/lpc.c
A src/southbridge/intel/i82801dx/smihandler.c
16 files changed, 258 insertions(+), 78 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/61517/5