Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75758?usp=email )
(
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/joxer: Add DmaProperty for ISH ......................................................................
mb/google/nissa/var/joxer: Add DmaProperty for ISH
On nissa, the ISH is running closed source firmware, so the ChromeOS security requirements specify it must be behind an IOMMU. Add DmaProperty to the ISH _DSD on joxer.
BUG=b:285477026 TEST=Kernel marks ISH (PCI device 12.0) as untrusted, and changes the IOMMU group type to "DMA". Also, device still goes to S0i3.
Before: $ cat /sys/devices/pci0000:00/0000:00:12.0/untrusted 0 $ ls /sys/kernel/iommu_groups/5/devices 0000:00:12.0 0000:00:12.7 $ cat /sys/kernel/iommu_groups/5/type DMA-FQ
After: $ cat /sys/devices/pci0000:00/0000:00:12.0/untrusted 1 $ ls /sys/kernel/iommu_groups/5/devices 0000:00:12.0 0000:00:12.7 $ cat /sys/kernel/iommu_groups/5/type DMA
Signed-off-by: Mark Hsieh mark_hsieh@wistron.corp-partner.google.com Change-Id: I69b00f0281f4493db157783840d9cdcbb138017f Reviewed-on: https://review.coreboot.org/c/coreboot/+/75758 Reviewed-by: Derek Huang derekhuang@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/variants/joxer/overridetree.cb 1 file changed, 6 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Derek Huang: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index 59a9fdd..e591b13 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -197,7 +197,12 @@ end device ref pcie_rp7 off end # PCIE7 no SD card device ref emmc on end - device ref ish on end + device ref ish on + chip drivers/intel/ish + register "add_acpi_dma_property" = "true" + device generic 0 on end + end + end device ref ufs on end device ref pch_espi on chip ec/google/chromeec