Attention is currently required from: Cliff Huang, Kapil Porwal, Pranava Y N.
Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84297?usp=email )
Change subject: soc/intel/ptl: Add GPE1 defines
......................................................................
Patch Set 9:
(1 comment)
File src/soc/intel/pantherlake/include/soc/pm.h:
https://review.coreboot.org/c/coreboot/+/84297/comment/b9af8404_0e0793f0?usp... :
PS9, Line 133: #if CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1)
we can drop this CPP. Anyway this is part of the SoC code and no harm if we define those bit-field without actually using it
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