Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44457 )
Change subject: util/intelp2m: Add support for Cannonlake-LP SoCs ......................................................................
util/intelp2m: Add support for Cannonlake-LP SoCs
Add support for Cannonlake-LP SoCs (Whiskeylake-U, Coffeelake-U, Cometlake-U) as a separate parsing profile, copying the existing 'Sunrise' profile and adjusting for differences in reset mapping and GPIO macro generation
Test: convert inteltool GPIO log dump into coreboot macros for an out-of-tree CML-U board.
Change-Id: I86296697ee892af7aa0818fb608b6d68fad2f307 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M util/intelp2m/config/config.go M util/intelp2m/description.md M util/intelp2m/main.go M util/intelp2m/parser/parser.go A util/intelp2m/platforms/cnl/macro.go A util/intelp2m/platforms/cnl/template.go 6 files changed, 302 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/44457/1
diff --git a/util/intelp2m/config/config.go b/util/intelp2m/config/config.go index 9f0b757..724de8c 100644 --- a/util/intelp2m/config/config.go +++ b/util/intelp2m/config/config.go @@ -27,6 +27,7 @@ SunriseType uint8 = 0 LewisburgType uint8 = 1 ApolloType uint8 = 2 + CannonType uint8 = 3 )
var key uint8 = SunriseType @@ -34,7 +35,8 @@ var platform = map[string]uint8{ "snr": SunriseType, "lbg": LewisburgType, - "apl": ApolloType} + "apl": ApolloType, + "cnl": CannonType} func PlatformSet(name string) int { if platformType, valid := platform[name]; valid { key = platformType @@ -57,6 +59,9 @@ func IsPlatformLewisburg() bool { return IsPlatform(LewisburgType) } +func IsPlatformCannonLake() bool { + return IsPlatform(CannonType) +}
var InputRegDumpFile *os.File = nil var OutputGenFile *os.File = nil diff --git a/util/intelp2m/description.md b/util/intelp2m/description.md index 3008c04..19a7e76 100644 --- a/util/intelp2m/description.md +++ b/util/intelp2m/description.md @@ -37,6 +37,7 @@ snr - Sunrise PCH with Skylake/Kaby Lake CPU lbg - Lewisburg PCH with Xeon SP CPU apl - Apollo Lake SoC + cnp - CannonPoint-LP PCH or Whiskeylake/Coffelake/Cometlake-U SoC (default "snr")
(shell)$ ./intelp2m -p <platform> -file path/to/inteltool.log @@ -198,4 +199,4 @@ ``` ### Supports Chipsets
- Sunrise PCH, Lewisburg PCH, Apollo Lake SoC + Sunrise PCH, Lewisburg PCH, Apollo Lake SoC, CannonPoint-LP PCH diff --git a/util/intelp2m/main.go b/util/intelp2m/main.go index 6c6dc343..8527c54 100644 --- a/util/intelp2m/main.go +++ b/util/intelp2m/main.go @@ -81,7 +81,8 @@ platform := flag.String("p", "snr", "set platform:\n"+ "\tsnr - Sunrise PCH or Skylake/Kaby Lake SoC\n"+ "\tlbg - Lewisburg PCH with Xeon SP\n"+ - "\tapl - Apollo Lake SoC\n") + "\tapl - Apollo Lake SoC\n"+ + "\tcnl - CannonLake-LP or Whiskeylake/Coffelake/Cometlake-U SoC\n")
filedstyle := flag.String("fld", "none", "set fileds macros style:\n"+ "\tcb - use coreboot style for bit fields macros\n"+ diff --git a/util/intelp2m/parser/parser.go b/util/intelp2m/parser/parser.go index f002cc9..8941487 100644 --- a/util/intelp2m/parser/parser.go +++ b/util/intelp2m/parser/parser.go @@ -10,6 +10,7 @@ import "../platforms/snr" import "../platforms/lbg" import "../platforms/apl" +import "../platforms/cnl" import "../config"
// PlatformSpecific - platform-specific interface @@ -141,6 +142,7 @@ InheritanceTemplate : snr.PlatformSpecific{}, }, config.ApolloType : apl.PlatformSpecific{}, + config.CannonType : cnl.PlatformSpecific{}, } parser.platform = platform[config.PlatformGet()] } @@ -198,7 +200,7 @@ // padConfigurationExtract - reads GPIO configuration registers and returns true if the // information from the inteltool log was successfully parsed. func (parser *ParserData) padConfigurationExtract() bool { - // Only for Sunrise PCH and only for inteltool.log file template + // Only for Sunrise or CannonLake, and only for inteltool.log file template if config.TemplateGet() != config.TempInteltool || config.IsPlatformApollo() { return false } diff --git a/util/intelp2m/platforms/cnl/macro.go b/util/intelp2m/platforms/cnl/macro.go new file mode 100644 index 0000000..a86ddd4 --- /dev/null +++ b/util/intelp2m/platforms/cnl/macro.go @@ -0,0 +1,254 @@ +package cnl + +import "strings" +import "fmt" + +// Local packages +import "../common" +import "../../config" +import "../../fields" + +const ( + PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc + PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff +) + +const ( + PAD_CFG_DW0 = common.PAD_CFG_DW0 + PAD_CFG_DW1 = common.PAD_CFG_DW1 + MAX_DW_NUM = common.MAX_DW_NUM +) + +type PlatformSpecific struct {} + +// RemmapRstSrc - remmap Pad Reset Source Config +func (PlatformSpecific) RemmapRstSrc() { + macro := common.GetMacro() + if config.TemplateGet() != config.TempInteltool { + // Use reset source remapping only if the input file is inteltool.log dump + return + } + if strings.Contains(macro.PadIdGet(), "GPP_A") || + strings.Contains(macro.PadIdGet(), "GPP_B") || + strings.Contains(macro.PadIdGet(), "GPP_G") { + // See reset map for the Cannonlake Groups the Community 0: + // https://github.com/coreboot/coreboot/blob/master/src/soc/intel/cannonlake/gp... + // remmap is not required because it is the same as common. + return + } + + dw0 := macro.Register(PAD_CFG_DW0) + var remapping = map[uint8]uint32{ + 0: common.RST_RSMRST << common.PadRstCfgShift, + 1: common.RST_DEEP << common.PadRstCfgShift, + 2: common.RST_PLTRST << common.PadRstCfgShift, + } + resetsrc, valid := remapping[dw0.GetResetConfig()] + if valid { + // dw0.SetResetConfig(resetsrc) + ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()] + dw0.ValueSet(ResetConfigFieldVal) + } else { + fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet()) + } + dw0.CntrMaskFieldsClear(common.PadRstCfgMask) +} + +// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro +// as a new argument +func (PlatformSpecific) Pull() { + macro := common.GetMacro() + dw1 := macro.Register(PAD_CFG_DW1) + var pull = map[uint8]string{ + 0x0: "NONE", + 0x2: "DN_5K", + 0x4: "DN_20K", + 0x9: "UP_1K", + 0xa: "UP_5K", + 0xb: "UP_2K", + 0xc: "UP_20K", + 0xd: "UP_667", + 0xf: "NATIVE", + } + str, valid := pull[dw1.GetTermination()] + if !valid { + str = "INVALID" + fmt.Println("Error", + macro.PadIdGet(), + " invalid TERM value = ", + int(dw1.GetTermination())) + } + macro.Separator().Add(str) +} + +// Generate macro to cause peripheral IRQ when configured in GPIO input mode +func ioApicRoute() bool { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + if dw0.GetGPIOInputRouteIOxAPIC() == 0 { + return false + } + + macro.Add("_APIC") + // PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) + macro.Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") + return true + +} + +// Generate macro to cause NMI when configured in GPIO input mode +func nmiRoute() bool { + macro := common.GetMacro() + if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 { + return false + } + // PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT), + macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") + return true +} + +// Generate macro to cause SCI when configured in GPIO input mode +func sciRoute() bool { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + if dw0.GetGPIOInputRouteSCI() == 0 { + return false + } + // PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv) + macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") + return true +} + + +// Generate macro to cause SMI when configured in GPIO input mode +func smiRoute() bool { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + if dw0.GetGPIOInputRouteSMI() == 0 { + return false + } + // PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) + macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") + return true +} + +// Adds PAD_CFG_GPI macro with arguments +func (PlatformSpecific) GpiMacroAdd() { + macro := common.GetMacro() + var ids []string + macro.Set("PAD_CFG_GPI") + for routeid, isRoute := range map[string]func() (bool) { + "IOAPIC": ioApicRoute, + "SCI": sciRoute, + "SMI": smiRoute, + "NMI": nmiRoute, + } { + if isRoute() { + ids = append(ids, routeid) + } + } + + switch argc := len(ids); argc { + case 0: + // e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) + macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),") + case 1: + // GPI with IRQ route + if config.AreFieldsIgnored() { + // Set Host Software Ownership to ACPI mode + macro.SetPadOwnership(common.PAD_OWN_ACPI) + } + + case 2: + // PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) + macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert() + macro.Add(", " + ids[0] + ", " + ids[1] + "),") + if config.AreFieldsIgnored() { + // Set Host Software Ownership to ACPI mode + macro.SetPadOwnership(common.PAD_OWN_ACPI) + } + default: + // Clear the control mask so that the check fails and "Advanced" macro is + // generated + macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + } +} + +// Adds PAD_CFG_GPO macro with arguments +func (PlatformSpecific) GpoMacroAdd() { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + term := macro.Register(PAD_CFG_DW1).GetTermination() + + // #define PAD_CFG_GPO(pad, val, rst) \ + // _PAD_CFG_STRUCT(pad, \ + // PAD_FUNC(GPIO) | PAD_RESET(rst) | \ + // PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \ + // PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE)) + if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF { + dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask) + } + macro.Set("PAD_CFG") + if macro.IsOwnershipDriver() { + // PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull) + macro.Add("_GPO_GPIO_DRIVER").Add("(").Id().Val().Rstsrc().Pull().Add("),") + return + } + if term != 0 { + // e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP), + macro.Add("_TERM") + } + macro.Add("_GPO").Add("(").Id().Val() + if term != 0 { + macro.Pull() + } + macro.Rstsrc().Add("),") +} + +// Adds PAD_CFG_NF macro with arguments +func (PlatformSpecific) NativeFunctionMacroAdd() { + macro := common.GetMacro() + // e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1) + macro.Set("PAD_CFG_NF") + if macro.Register(PAD_CFG_DW1).GetPadTol() != 0 { + macro.Add("_1V8") + } + macro.Add("(").Id().Pull().Rstsrc().Padfn().Add("),") +} + +// Adds PAD_NC macro +func (PlatformSpecific) NoConnMacroAdd() { + macro := common.GetMacro() + // #define PAD_NC(pad, pull) + // _PAD_CFG_STRUCT(pad, + // PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), + // PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)), + dw0 := macro.Register(PAD_CFG_DW0) + + // Some fields of the configuration registers are hidden inside the macros, + // we should check them to update the corresponding bits in the control mask. + if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF { + dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask) + } + if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP + dw0.CntrMaskFieldsClear(common.PadRstCfgMask) + } + + macro.Set("PAD_NC").Add("(").Id().Pull().Add("),") +} + +// GenMacro - generate pad macro +// dw0 : DW0 config register value +// dw1 : DW1 config register value +// return: string of macro +// error +func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string { + macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet()) + macro.Clear() + macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.PadIdSet(id).SetPadOwnership(ownership) + macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS) + macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS) + return macro.Generate() +} diff --git a/util/intelp2m/platforms/cnl/template.go b/util/intelp2m/platforms/cnl/template.go new file mode 100644 index 0000000..9221109 --- /dev/null +++ b/util/intelp2m/platforms/cnl/template.go @@ -0,0 +1,35 @@ +package cnl + +import "strings" + +// GroupNameExtract - This function extracts the group ID, if it exists in a row +// line : string from the configuration file +// return +// bool : true if the string contains a group identifier +// string : group identifier +func (PlatformSpecific) GroupNameExtract(line string) (bool, string) { + for _, groupKeyword := range []string{ + "GPP_A", "GPP_B", "GPP_G", + "GPP_D", "GPP_F", "GPP_H", + "GPD", "GPP_C", "GPP_E", + } { + if strings.Contains(line, groupKeyword) { + return true, groupKeyword + } + } + return false, "" +} + +// KeywordCheck - This function is used to filter parsed lines of the configuration file and +// returns true if the keyword is contained in the line. +// line : string from the configuration file +func (PlatformSpecific) KeywordCheck(line string) bool { + for _, keyword := range []string{ + "GPP_", "GPD", + } { + if strings.Contains(line, keyword) { + return true + } + } + return false +}