[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add a power control workaround for SD controller

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31445 )

Change subject: soc/intel/cannonlake: Add a power control workaround for SD controller
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Patch Set 8: Code-Review-1

(1 comment)

https://review.coreboot.org/#/c/31445/8/src/soc/intel/cannonlake/Kconfig 
File src/soc/intel/cannonlake/Kconfig:

https://review.coreboot.org/#/c/31445/8/src/soc/intel/cannonlake/Kconfig@238 
PS8, Line 238: config MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
This adds a redundant setting. If I'm not complete confused,
we have that information already somewhere in the mainboard
code.