Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Felix Held, Jincheng Li, Johnny Lin, Jonathan Zhang, Nico Huber, Patrick Rudolph, Paul Menzel, TangYiwei, Tim Chu.
Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81316?usp=email )
Change subject: soc/intel/xeon_sp: Add Granite Rapids initial codes
......................................................................
Patch Set 46:
(4 comments)
File src/soc/intel/xeon_sp/gnr/cpu.c:
https://review.coreboot.org/c/coreboot/+/81316/comment/b0fe637b_919deba9 :
PS45, Line 33: return false;
Is this correct? I thought firmware (FSP?) switches to untrusted mode at some point. […]
Good catch! Updated.
File src/soc/intel/xeon_sp/gnr/soc_util.c:
https://review.coreboot.org/c/coreboot/+/81316/comment/2d19eb53_6903505f :
PS45, Line 118: printk(BIOS_DEBUG,
: "CXL_NODE_HOB_GUID not found: CXL may not be installed\n");
nitpick: This looks rather odd, it should fit in one line
Done
File src/soc/intel/xeon_sp/spr/soc_acpi.c:
https://review.coreboot.org/c/coreboot/+/81316/comment/8290c266_c28c3df7 :
PS45, Line 158: unsigned long xeonsp_acpi_create_madt_lapics(unsigned long current)
: {
: struct device *cpu;
: uint8_t num_cpus = 0;
:
: for (cpu = all_devices; cpu; cpu = cpu->next) {
: if ((cpu->path.type != DEVICE_PATH_APIC)
: || (cpu->upstream->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
: continue;
: }
: if (!cpu->enabled)
: continue;
: current = acpi_create_madt_one_lapic(current, num_cpus, cpu->path.apic.apic_id);
: num_cpus++;
: }
:
: return current;
: }
Where did this go?
it is covered by the common codes acpi_arch_fill_madt
File src/soc/intel/xeon_sp/uncore.c:
https://review.coreboot.org/c/coreboot/+/81316/comment/53bc7d11_645d48eb :
PS45, Line 268: if (CONFIG(SOC_INTEL_HAS_CXL)) {
Could this change (introducing the `soc_add_dram_resources` function) be split off into a separate c […]
Done
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