[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell: Drop invalid MMIO_PAVP_MSG write

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46994 )

Change subject: nb/intel/haswell: Drop invalid MMIO_PAVP_MSG write
......................................................................

nb/intel/haswell: Drop invalid MMIO_PAVP_MSG write

This write was copied from Sandy Bridge. Neither Haswell reference code
nor Broadwell perform this write. Therefore, it is safe to remove it.

Change-Id: I8869ff3e66362d9910235c554c3a07e91f479a82
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/haswell/northbridge.c
1 file changed, 0 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/46994/1

diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index e31337b..bbc6bf6 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -585,9 +585,6 @@
    /* Configure turbo power limits 1ms after reset complete bit */
    mdelay(1);
    set_power_limits(28);
-
-	/* Set here before graphics PM init. */
-	MCHBAR32(MMIO_PAVP_MSG) = 0x00100001;
 }

static struct device_operations mc_ops = {