[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Correct GPE DWx assignment as per EDS

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Boris Mittelberg.
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Sugnan Prabhu S, Angel Pons, Patrick Rudolph, EricR Lai, Boris Mittelberg,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/51789

to look at the new patch set (#3).

Change subject: soc/intel/alderlake: Correct GPE DWx assignment as per EDS
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soc/intel/alderlake: Correct GPE DWx assignment as per EDS

Update GPIO Group to GPE DWx assignment encoding as per MISCCFG
register per GPIO Community.

TEST=Able to fix the TPM IRQ issue on SM.

Change-Id: Id9f57b0b5726315f5ebba013f11d52ed3ee34484
Signed-off-by: Subrata Banik 
---
M src/soc/intel/alderlake/gpio.c
M src/soc/intel/alderlake/include/soc/gpio_soc_defs.h
M src/soc/intel/alderlake/include/soc/pmc.h
3 files changed, 16 insertions(+), 27 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/51789/3