Attention is currently required from: Bora Guvendik, Lance Zhao, Anil Kumar K, Cliff Huang, Subrata Banik, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61352 )
Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ......................................................................
Patch Set 6: Code-Review+2
(6 comments)
File src/soc/intel/common/block/pcie/rtd3/chip.h:
https://review.coreboot.org/c/coreboot/+/61352/comment/44053cac_fadcb7b5 PS5, Line 9: ACPI_PCIE_RP_EMIT_NONE = 0x00, /* None */ : ACPI_PCIE_RP_EMIT_L23 = 0x01, /* L23 */ : ACPI_PCIE_RP_EMIT_PSD0 = 0x02, /* PSD0 */ : ACPI_PCIE_RP_EMIT_SRCK = 0x04, /* SRCK */ : ACPI_PCIE_RP_EMIT_L23_PSD0 = 0x03, /* L23, PSD0 */ : ACPI_PCIE_RP_EMIT_L23_SRCK = 0x05, /* L23, SRCK */ : ACPI_PCIE_RP_EMIT_PSD0_SRCK = 0x06, /* PSD0, SRCK */ : ACPI_PCIE_RP_EMIT_ALL = 0x07 /* L23, PSD0, SRCK */ : };
Currently, each bit is corresponding method (i.e. […]
You know what, I was thinking too far ahead, I was thinking of refactoring this too, so that the internal driver could reuse the L23D/DL23, etc. methods so that there is not so much duplication in the emitted AML. But this will work for now.
File src/soc/intel/common/block/pcie/rtd3/rtd3.c:
https://review.coreboot.org/c/coreboot/+/61352/comment/e845a443_3a0e2201 PS5, Line 336: || pcie_rp > CONFIG_MAX_ROOT_PORTS
I think so, will fix this. Good catch.
Done
File src/soc/intel/common/block/pcie/rtd3/rtd3.c:
https://review.coreboot.org/c/coreboot/+/61352/comment/880d817d_1a55b781 PS6, Line 104: static void : pcie_rtd3_acpi_method_dl23(void) nit: fits on one line
https://review.coreboot.org/c/coreboot/+/61352/comment/329aaa2a_4061f115 PS6, Line 113: static void : pcie_rtd3_acpi_method_l23d(void) nit: fits on one line
https://review.coreboot.org/c/coreboot/+/61352/comment/19f63060_461fa1fe PS6, Line 122: static void : pcie_rtd3_acpi_method_pds0(unsigned int pcie_rp) nit: fits on one line
https://review.coreboot.org/c/coreboot/+/61352/comment/928ac9f1_38024b14 PS6, Line 131: static void : pcie_rtd3_acpi_method_srck(unsigned int pcie_rp, : const struct soc_intel_common_block_pcie_rtd3_config *config) nit: ``` static void pcie_rtd3_acpi_method_srck(unsigned int pcie_rp, const struct soc_intel_common_block_pcie_rtd3_config *config) ```