Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim.
Cliff Huang has posted comments on this change by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )
Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
......................................................................
Patch Set 125:
(4 comments)
Patchset:
PS123:
As GPE1 changes might take longer time, i'm suggesting to push CLs w/o GPE1 for now and we can add t […]
Acknowledged
File src/soc/intel/pantherlake/acpi/southbridge.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/709e75dd_111d50b5?usp... :
PS81, Line 11: #if CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB)
Subrata, I don't quite follow. The CL 84138 you mentioned contains changes removing soc/itss.h. […]
Done
File src/soc/intel/pantherlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/24d64fb9_c3b963f9?usp... :
PS123, Line 218: If (CondRefOf (_SB.PCI0.TXHC)) {
: /* Invoke PCIe root ports wake event handler */
: _SB.PCI0.TRP0.HPEV()
: }
: /* Check Root Port 0 for a Hot Plug Event if the port is enabled */
: If (((_SB.PCI0.TRP0.VDID != 0xFFFFFFFF) && _SB.PCI0.TRP0.HPSX)) {
: If (_SB.PCI0.TRP0.PDCX) {
: /* Clear all status bits */
: _SB.PCI0.TRP0.PDCX = 1
: _SB.PCI0.TRP0.HPSX = 1
: /*
: * Intercept Presence Detect Changed interrupt and make sure
: * the L0s is disabled on empty slots.
: */
: If (!_SB.PCI0.TRP0.PDSX) {
: /*
: * The PCIe slot is empty, so disable L0s on hot unplug.
: */
: _SB.PCI0.TRP0.L0SE = 0
: }
: /* Performs proper notification to the OS. */
: Notify (_SB.PCI0.TRP0, 0)
: } Else {
: /* False event. Clear Hot-Plug status, then exit. */
: _SB.PCI0.TRP0.HPSX = 1
: }
: }
please create helper function and call into w/o adding implementation for each RP here.
defer GPE1 related changes from upstream.
File src/soc/intel/pantherlake/acpi/tcss_pcierp.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/482dcb84_e5505f8d?usp... :
PS123, Line 236: }
please leave one space before
Done
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