Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/11858
-gerrit
commit 0cf1773806ca08ec5e65515965ca882df1ec34ea Author: Alexandru Gagniuc mr.nuke.me@gmail.com Date: Sat Oct 10 16:35:58 2015 -0700
cpu/qemu-x86: Run a C environment in the bootblock
Make use of the ROMCC-less bootblock introduced earlier. The "qemu" cpu is particularly easy because it does not require CAR setup.
Change-Id: Idf161d363d2daf3c55454d376ca42d492463971a Signed-off-by: Alexandru Gagniuc mr.nuke.me@gmail.com --- src/cpu/qemu-x86/Kconfig | 1 + src/cpu/qemu-x86/Makefile.inc | 2 ++ src/cpu/qemu-x86/bootblock.c | 55 ++++++++++++++++++++++++++++++++++++++++ src/cpu/qemu-x86/bootblock_asm.S | 48 +++++++++++++++++++++++++++++++++++ 4 files changed, 106 insertions(+)
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index ea2bc46..0ace941 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,4 +19,5 @@ config CPU_QEMU_X86 select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select C_ENVIRONMENT_BOOTBLOCK select SMP diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index b5f8369..0ed76f9 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -12,6 +12,8 @@ ## GNU General Public License for more details. ##
+bootblock-y += bootblock_asm.S +bootblock-y += bootblock.c ramstage-y += qemu.c subdirs-y += ../x86/mtrr subdirs-y += ../x86/lapic diff --git a/src/cpu/qemu-x86/bootblock.c b/src/cpu/qemu-x86/bootblock.c new file mode 100644 index 0000000..92dd6f7 --- /dev/null +++ b/src/cpu/qemu-x86/bootblock.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Alexandru Gagniuc mr.nuke.me@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/cpu.h> +#include <cbfs.h> +#include <halt.h> + +/* Called from assembly. Prototype not needed by external .c file */ +asmlinkage void bootblock_main(uint32_t bist, uint32_t tsc_lo, uint32_t tsc_hi); + +/* + * TODO: Implement a generic fallback/normal mechanism + */ +static const char *get_next_stage_name(void) +{ + if (IS_ENABLED(CONFIG_BOOTBLOCK_SIMPLE)) + return CONFIG_CBFS_PREFIX "/romstage"; + + /* BOOTBLOCK_NORMAL not implemented */ + return CONFIG_CBFS_PREFIX "/romstage"; +} + +static void enter_romstage(void *romstage_entry, uint32_t bist) +{ + asm volatile ( + "jmp *%0\n\t" + : : "r" (romstage_entry), "a" (bist) + ); +} + +asmlinkage void bootblock_main(uint32_t bist, uint32_t tsc_lo, uint32_t tsc_hi) +{ + void *entry; + struct cbfs_stage *romstage; + const char* target1 = get_next_stage_name(); + + romstage = cbfs_boot_map_with_leak(target1, CBFS_TYPE_STAGE, NULL); + + /* + * TODO: Do something constructive with tsc_lo and tsc_hi + */ + if (romstage) { + entry = (void *)(uintptr_t)romstage->entry; + enter_romstage(entry, bist); + } + halt(); +} diff --git a/src/cpu/qemu-x86/bootblock_asm.S b/src/cpu/qemu-x86/bootblock_asm.S new file mode 100644 index 0000000..6e1cd2e --- /dev/null +++ b/src/cpu/qemu-x86/bootblock_asm.S @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Alexandru Gagniuc mr.nuke.me@gmail.com + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + */ + +#include <console/post_codes.h> + +#define STACK_SIZE 0x10000 +#define STACK_BASE 0xd0000 + +.intel_syntax noprefix + +#define post_code(code) \ + mov eax, code; \ + out 0x80, eax + +.global bootblock_pre_c_entry + +.section .text +bootblock_pre_c_entry: + + /* Set up a stack */ + mov esp, (STACK_BASE + STACK_SIZE - 4) + + /* + * We have the following values saved from earlier: + * mm0: BIST result + * mm1: TSC timestamp low 32 bits + * mm2: TSC timestamp high 32 bits + */ + movd eax, mm2 + push eax + movd eax, mm1 + push eax + movd eax, mm0 + push eax + call bootblock_main + +.halt_forever: + post_code(POST_DEAD_CODE) + hlt + jmp .halt_forever