Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44671 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIO pad to enable I2C4 ......................................................................
mb/intel/jasperlake_rvp: Configure GPIO pad to enable I2C4
Includes changes related to GPIO pad to configure I2C4 required for UFC
Change-Id: Ica3ac31f10214b8aff3bb64a2c3b42ccfa28bdcd Signed-off-by: Sugnan Prabhu S sugnan.prabhu.s@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44671 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-by: Aamir Bohra aamir.bohra@intel.com --- M src/mainboard/intel/jasperlake_rvp/mainboard.c 1 file changed, 7 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Aamir Bohra: Looks good to me, approved Maulik V Vaghela: Looks good to me, approved
diff --git a/src/mainboard/intel/jasperlake_rvp/mainboard.c b/src/mainboard/intel/jasperlake_rvp/mainboard.c index 3b9dff9..315d47d 100644 --- a/src/mainboard/intel/jasperlake_rvp/mainboard.c +++ b/src/mainboard/intel/jasperlake_rvp/mainboard.c @@ -3,10 +3,14 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <device/device.h> +#include <intelblocks/pcr.h> #include <soc/gpio.h> +#include <soc/pcr_ids.h> #include <smbios.h> #include <vendorcode/google/chromeos/chromeos.h>
+#define SERIAL_IO_PCR_GPPRVRW4 0x60C + static void mainboard_init(void *chip_info) { const struct pad_config *pads; @@ -14,6 +18,9 @@
pads = variant_gpio_table(&num); gpio_configure_pads(pads, num); + + if (CONFIG(DRIVERS_INTEL_MIPI_CAMERA)) + pcr_write32(PID_SERIALIO, SERIAL_IO_PCR_GPPRVRW4, BIT8); }
static void mainboard_enable(struct device *dev)