[coreboot-gerrit] [S] Change in coreboot[main]: mb/emulation/qemu: Configure TSEG size

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83114?usp=email )

Change subject: mb/emulation/qemu: Configure TSEG size
......................................................................

mb/emulation/qemu: Configure TSEG size

Configure TSEG size by reading CONFIG_SMM_TSEG_SIZE in romstage.
The remaining Qemu code can already handle the bigger TSEG region.

TEST: Increased TSEG to 8MiB.

Change-Id: I1ae5ac93ecca83ae9c319c666aac844bbd5b259f
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83114
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/cpu/qemu-x86/Kconfig
M src/mainboard/emulation/qemu-q35/romstage.c
2 files changed, 22 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index 221a7ba..e1469d6 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -31,6 +31,11 @@

endchoice

+config SMM_TSEG_SIZE
+	hex
+	depends on SMM_TSEG
+	default 0x100000
+
 config MAX_CPUS
    int
    default 32 if SMM_TSEG
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c
index ff06640..d4700d5 100644
--- a/src/mainboard/emulation/qemu-q35/romstage.c
+++ b/src/mainboard/emulation/qemu-q35/romstage.c
@@ -7,6 +7,8 @@

#include "q35.h"

+#define TSEG_SZ_MASK	(3 << 1)
+
 void mainboard_romstage_entry(void)
 {
    i82801ix_early_init();
@@ -14,5 +16,20 @@
    if (!CONFIG(BOOTBLOCK_CONSOLE))
    	mainboard_machine_check();

+	/* Configure requested TSEG size */
+	switch (CONFIG_SMM_TSEG_SIZE) {
+	case 1 * MiB:
+		pci_update_config8(HOST_BRIDGE, ESMRAMC, ~TSEG_SZ_MASK, 0 << 1);
+		break;
+	case 2 * MiB:
+		pci_update_config8(HOST_BRIDGE, ESMRAMC, ~TSEG_SZ_MASK, 1 << 1);
+		break;
+	case 8 * MiB:
+		pci_update_config8(HOST_BRIDGE, ESMRAMC, ~TSEG_SZ_MASK, 2 << 1);
+		break;
+	default:
+		printk(BIOS_WARNING, "%s: Unsupported TSEG size: 0x%x\n", __func__, CONFIG_SMM_TSEG_SIZE);
+	}
+
    cbmem_recovery(0);
 }