Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11013
-gerrit
commit 76115d9f05e7c04ad69eab2d3ca3ad741687a192 Author: Hannah Williams hannah.williams@intel.com Date: Sat Jul 18 16:04:21 2015 -0700
google/cyan: Configure EC_IN_RW signal as gpio input
BUG=chrome-os-partner:42881 BRANCH=None TEST=Using ctrl-d in recovery mode to switch to dev mode works.
Change-Id: Iefbd11d435c4beb570875d4835a085b194d1d1e8 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: be172409792a224855b1d31621f23d1969d319b9 Original-Signed-off-by: Hannah Williams hannah.williams@intel.com Original-Change-Id: Icf57dfc4cc258aa2cba341f40d285f8c843aace5 Original-Reviewed-on: https://chromium-review.googlesource.com/286612 Original-Commit-Queue: Hannah Williams hannah.williams@intel.com Original-Tested-by: Hannah Williams hannah.williams@intel.com Original-Reviewed-by: Shawn N shawnn@chromium.org --- src/mainboard/google/cyan/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/cyan/gpio.c b/src/mainboard/google/cyan/gpio.c index 3cd319d..3030477 100644 --- a/src/mainboard/google/cyan/gpio.c +++ b/src/mainboard/google/cyan/gpio.c @@ -131,7 +131,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_INPUT_NO_PULL,/* 67 I2C3_SCL,RAMID1 */ GPIO_OUT_HIGH, /* 75 SATA_GP0 */ GPIO_NC, /* 76 GPI SATA_GP1 */ - Native_M1, /* 77 SATA_LEDN */ + GPIO_INPUT_PU_20K, /* 77 SATA_LEDN, EC_IN_RW */ GPIO_NC, /* 78 HSIC AUX1 / SV Mode/ SATA_GP2 */ Native_M1, /* 79 MF_SMB_ALERTB */ GPIO_INPUT_NO_PULL, /* 80 SATA_GP3,RAMID0 */