Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45661 )
Change subject: soc/amd/picasso: Set eMMC preset UPDs ......................................................................
soc/amd/picasso: Set eMMC preset UPDs
Now that all boards have bootable driver strengths and init frequency, we can pass them to FSP.
BUG=b:159823235 TEST=Boot ezkinil to kernel and print presets.
SDHC0x8F0 Initialization 3.3V or 1.8V => 0x03ff 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x3ff: SdClkFreq SDHC0x8F2 Default Speed 3.3V => 0x0004 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x4: SdClkFreq SDHC0x8F4 High Speed 3.3V => 0x0002 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x2: SdClkFreq SDHC0x8F6 SDR12 1.8V => 0x0008 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x8: SdClkFreq SDHC0x8F8 SDR25 1.8V => 0x0004 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x4: SdClkFreq SDHC0x8FA SDR50 1.8V => 0x0002 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x2: SdClkFreq SDHC0x8FC SDR104 1.8V => 0x4000 14 => 0x1 [A]: DvrStrength 10 => 0: ClkGen 00 => 0: SdClkFreq SDHC0x8FE DDR50 1.8V => 0x0002 14 => 0 [B]: DvrStrength 10 => 0: ClkGen 00 => 0x2: SdClkFreq SDHC0x900 HS400 => 0x4000 14 => 0x1 [A]: DvrStrength 10 => 0: ClkGen 00 => 0: SdClkFreq
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I5fe5c0a5a5ecf292ce8703e9c9ea80b6f1b6440e --- M src/soc/amd/picasso/fsp_params.c 1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/45661/1
diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c index b21f237..95e691d 100644 --- a/src/soc/amd/picasso/fsp_params.c +++ b/src/soc/amd/picasso/fsp_params.c @@ -55,6 +55,11 @@ }
scfg->emmc0_mode = val; + scfg->emmc0_sdr104_hs400_driver_strength = + cfg->emmc_config.sdr104_hs400_driver_strength; + scfg->emmc0_ddr50_driver_strength = cfg->emmc_config.ddr50_driver_strength; + scfg->emmc0_sdr50_driver_strength = cfg->emmc_config.sdr50_driver_strength; + scfg->emmc0_init_khz_preset = cfg->emmc_config.init_khz_preset; }
static void fill_dxio_descriptors(FSP_S_CONFIG *scfg,