[coreboot-gerrit] Change in ...coreboot[master]: cbfs_spi: Enable speed logging by default for BIOS_DEBUG

[Julius Werner (Code Review)]

Hello Aaron Durbin, Furquan Shaikh,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/33281

to review the following change.

Change subject: cbfs_spi: Enable speed logging by default for BIOS_DEBUG
......................................................................

cbfs_spi: Enable speed logging by default for BIOS_DEBUG

The SPI transfer speed logging in cbfs_spi is super useful, doesn't get
in the way (just adding one line per stage, essentially) and should have
no notable overhead. Let's enable it by default for the BIOS_DEBUG log
level rather than having to recompile to get it.

Change-Id: I03c77938afe01fdcecf917e8c4c25cc29cdc764e
Signed-off-by: Julius Werner 
---
M src/drivers/spi/cbfs_spi.c
1 file changed, 3 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/33281/1

diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c
index e311752..175af25 100644
--- a/src/drivers/spi/cbfs_spi.c
+++ b/src/drivers/spi/cbfs_spi.c
@@ -31,21 +31,18 @@
 static bool spi_flash_init_done;

/*
- * Set this to 1 to debug SPI speed, 0 to disable it
- * The format is:
+ * SPI speed logging for big transfers available with BIOS_DEBUG. The format is:
  *
- * read SPI 62854 7db7: 10416 us, 3089 KB/s, 24.712 Mbps
+ * read SPI 0x62854 0x7db7: 10416 us, 3089 KB/s, 24.712 Mbps
  *
  * The important number is the last one. It should roughly match your SPI
  * clock. If it doesn't, your driver might need a little tuning.
  */
-#define SPI_SPEED_DEBUG		0
-
 static ssize_t spi_readat(const struct region_device *rd, void *b,
    			size_t offset, size_t size)
 {
    struct stopwatch sw;
-	bool show = SPI_SPEED_DEBUG && size >= 4 * KiB;
+	bool show = size >= 4 * KiB && console_log_level(BIOS_DEBUG);

if (show)
    	stopwatch_init(&sw);