Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56684 )
Change subject: soc/amd/cezanne/early_fch: Perform early SPI initialization ......................................................................
soc/amd/cezanne/early_fch: Perform early SPI initialization
Perform early SPI initialization which enables SPI ROM and setting the speed & read modes.
BUG=b:194919326 TEST=Build and boot to OS in Guybrush.
Change-Id: Ibfbe6e16bd6b0dd46c13cecf2a35f0c0b4576b88 Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com --- M src/soc/amd/cezanne/early_fch.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/56684/1
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 5d268bc..7c4570b 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -45,6 +45,7 @@ { lpc_early_init();
+ fch_spi_early_init(); enable_acpimmio_decode_pm04(); fch_smbus_init(); fch_enable_cf9_io();